From 7a55c43b072ec2192d35df5e44cf37eb8be06555 Mon Sep 17 00:00:00 2001 From: jljusten Date: Wed, 16 Dec 2009 23:29:15 +0000 Subject: OVMF ResetVector: Modify interface with SEC module Previously it was: ESI/RSI - SEC Core entry point EDI/RDI - PEI Core entry point EBP/RBP - Start of BFV Now it is: RAX/EAX Initial value of the EAX register (BIST: Built-in Self Test) DI 'BP': boot-strap processor, or 'AP': application processor RBP/EBP Address of Boot Firmware Volume (BFV) git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9571 6f19259b-4bc3-4df7-8a09-765794883524 --- .../ResetVector/Bin/ResetVector.ia32.port80.raw | Bin 0 -> 548 bytes OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw | Bin 884 -> 532 bytes .../ResetVector/Bin/ResetVector.ia32.serial.raw | Bin 0 -> 932 bytes OvmfPkg/ResetVector/Bin/ResetVector.x64.port80.raw | Bin 0 -> 28676 bytes OvmfPkg/ResetVector/Bin/ResetVector.x64.raw | Bin 28676 -> 28676 bytes OvmfPkg/ResetVector/Bin/ResetVector.x64.serial.raw | Bin 0 -> 28676 bytes OvmfPkg/ResetVector/Build.py | 53 +++++ OvmfPkg/ResetVector/CommonMacros.inc | 16 +- OvmfPkg/ResetVector/DebugDisabled.asm | 26 +++ OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm | 137 ++++++------- OvmfPkg/ResetVector/Ia16/Init16.asm | 48 +++++ OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm | 51 ----- OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 43 ++-- OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm | 19 +- OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm | 50 +++-- .../ResetVector/Ia32/SearchForSecAndPeiEntries.asm | 222 --------------------- OvmfPkg/ResetVector/Ia32/SearchForSecEntry.asm | 196 ++++++++++++++++++ OvmfPkg/ResetVector/JumpToSec.asm | 63 ------ OvmfPkg/ResetVector/Main.asm | 106 ++++++++++ OvmfPkg/ResetVector/Port80Debug.asm | 28 +++ OvmfPkg/ResetVector/PostCodes.inc | 25 +++ OvmfPkg/ResetVector/ResetVectorCode.asm | 35 ++-- OvmfPkg/ResetVector/SerialDebug.asm | 46 +++-- 23 files changed, 655 insertions(+), 509 deletions(-) create mode 100644 OvmfPkg/ResetVector/Bin/ResetVector.ia32.port80.raw create mode 100644 OvmfPkg/ResetVector/Bin/ResetVector.ia32.serial.raw create mode 100644 OvmfPkg/ResetVector/Bin/ResetVector.x64.port80.raw create mode 100644 OvmfPkg/ResetVector/Bin/ResetVector.x64.serial.raw create mode 100644 OvmfPkg/ResetVector/Build.py create mode 100644 OvmfPkg/ResetVector/DebugDisabled.asm create mode 100644 OvmfPkg/ResetVector/Ia16/Init16.asm delete mode 100644 OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm delete mode 100644 OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm create mode 100644 OvmfPkg/ResetVector/Ia32/SearchForSecEntry.asm delete mode 100644 OvmfPkg/ResetVector/JumpToSec.asm create mode 100644 OvmfPkg/ResetVector/Main.asm create mode 100644 OvmfPkg/ResetVector/Port80Debug.asm create mode 100644 OvmfPkg/ResetVector/PostCodes.inc (limited to 'OvmfPkg') diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.ia32.port80.raw b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.port80.raw new file mode 100644 index 0000000..b136e69 Binary files /dev/null and b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.port80.raw differ diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw index 76286b9..f772255 100644 Binary files a/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw and b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw differ diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.ia32.serial.raw b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.serial.raw new file mode 100644 index 0000000..7b17db9 Binary files /dev/null and b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.serial.raw differ diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.x64.port80.raw b/OvmfPkg/ResetVector/Bin/ResetVector.x64.port80.raw new file mode 100644 index 0000000..307fc66 Binary files /dev/null and b/OvmfPkg/ResetVector/Bin/ResetVector.x64.port80.raw differ diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw b/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw index adf44b1..aff1447 100644 Binary files a/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw and b/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw differ diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.x64.serial.raw b/OvmfPkg/ResetVector/Bin/ResetVector.x64.serial.raw new file mode 100644 index 0000000..3224e3f Binary files /dev/null and b/OvmfPkg/ResetVector/Bin/ResetVector.x64.serial.raw differ diff --git a/OvmfPkg/ResetVector/Build.py b/OvmfPkg/ResetVector/Build.py new file mode 100644 index 0000000..ff723c8 --- /dev/null +++ b/OvmfPkg/ResetVector/Build.py @@ -0,0 +1,53 @@ +## @file +# Automate the process of building the various reset vector types +# +# Copyright (c) 2009, Intel Corporation +# +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +import glob +import os +import subprocess +import sys + +def RunCommand(commandLine): + #print ' '.join(commandLine) + return subprocess.call(commandLine) + +for filename in glob.glob(os.path.join('Bin', '*.raw')): + os.remove(filename) + +for arch in ('ia32', 'x64'): + for debugType in (None, 'port80', 'serial'): + output = os.path.join('Bin', 'ResetVector') + output += '.' + arch + if debugType is not None: + output += '.' + debugType + output += '.raw' + commandLine = ( + 'nasm', + '-D', 'ARCH_%s' % arch.upper(), + '-D', 'DEBUG_%s' % str(debugType).upper(), + '-o', output, + 'ResetVectorCode.asm', + ) + ret = RunCommand(commandLine) + print '\tASM\t' + output + if ret != 0: sys.exit(ret) + + commandLine = ( + 'python', + 'Tools/FixupForRawSection.py', + output, + ) + print '\tFIXUP\t' + output + ret = RunCommand(commandLine) + if ret != 0: sys.exit(ret) + diff --git a/OvmfPkg/ResetVector/CommonMacros.inc b/OvmfPkg/ResetVector/CommonMacros.inc index 19c6d07..c25c866 100644 --- a/OvmfPkg/ResetVector/CommonMacros.inc +++ b/OvmfPkg/ResetVector/CommonMacros.inc @@ -1,4 +1,6 @@ ;------------------------------------------------------------------------------ +; @file +; Common macros used in the ResetVector VTF module. ; ; Copyright (c) 2008, Intel Corporation ; All rights reserved. This program and the accompanying materials @@ -9,25 +11,11 @@ ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; -; Module Name: -; -; CommonMacros.inc -; -; Abstract: -; -; Common macros used in the ResetVector VTF module. -; ;------------------------------------------------------------------------------ %define ADDR16_OF(x) (0x10000 - fourGigabytes + x) %define ADDR_OF(x) (0x100000000 - fourGigabytes + x) -%macro callEdx 1 - mov edx, ADDR_OF(%%returnLabel) - jmp %1 -%%returnLabel: -%endmacro - %macro OneTimeCall 1 jmp %1 %1 %+ OneTimerCallReturn: diff --git a/OvmfPkg/ResetVector/DebugDisabled.asm b/OvmfPkg/ResetVector/DebugDisabled.asm new file mode 100644 index 0000000..78389f4 --- /dev/null +++ b/OvmfPkg/ResetVector/DebugDisabled.asm @@ -0,0 +1,26 @@ +;------------------------------------------------------------------------------ +; @file +; Debug disabled +; +; Copyright (c) 2009, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + +BITS 16 + +%macro debugInitialize 0 + ; + ; No initialization is required + ; +%endmacro + +%macro debugShowPostCode 1 +%endmacro + diff --git a/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm b/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm index d030c0b..47e3c6d 100644 --- a/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm +++ b/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm @@ -1,6 +1,8 @@ ;------------------------------------------------------------------------------ +; @file +; Transition from 16 bit real mode into 32 bit flat protected mode ; -; Copyright (c) 2008, Intel Corporation +; Copyright (c) 2008 - 2009, Intel Corporation ; All rights reserved. This program and the accompanying materials ; are licensed and made available under the terms and conditions of the BSD License ; which accompanies this distribution. The full text of the license may be found at @@ -9,14 +11,6 @@ ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; -; Module Name: -; -; 16RealTo32Flat.asm -; -; Abstract: -; -; Transition from 16 bit real mode into 32 bit flat protected mode -; ;------------------------------------------------------------------------------ %define SEC_DEFAULT_CR0 0x40000023 @@ -24,11 +18,12 @@ BITS 16 -to32BitFlat: +; +; Modified: EAX, EBX +; +TransitionFromReal16To32BitFlat: - writeToSerialPort '1' - writeToSerialPort '6' - writeToSerialPort ' ' + debugShowPostCode POSTCODE_16BIT_MODE cli @@ -42,10 +37,6 @@ o32 lgdt [bx] mov eax, SEC_DEFAULT_CR0 mov cr0, eax -; mov eax, cr0 -; or al, 1 -; mov cr0, eax - jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere) BITS 32 jumpTo32BitAndLandHere: @@ -53,18 +44,16 @@ jumpTo32BitAndLandHere: mov eax, SEC_DEFAULT_CR4 mov cr4, eax - writeToSerialPort '3' - writeToSerialPort '2' - writeToSerialPort ' ' + debugShowPostCode POSTCODE_32BIT_MODE - mov ax, LINEAR_SEL - mov ds, ax - mov es, ax - mov fs, ax - mov gs, ax - mov ss, ax + mov ax, LINEAR_SEL + mov ds, ax + mov es, ax + mov fs, ax + mov gs, ax + mov ss, ax - jmp TransitionFrom16RealTo32FlatComplete + OneTimeCallRet TransitionFromReal16To32BitFlat ALIGN 2 @@ -77,75 +66,75 @@ ALIGN 16 GDT_BASE: ; null descriptor NULL_SEL equ $-GDT_BASE - dw 0 ; limit 15:0 - dw 0 ; base 15:0 - db 0 ; base 23:16 - db 0 ; type - db 0 ; limit 19:16, flags - db 0 ; base 31:24 + dw 0 ; limit 15:0 + dw 0 ; base 15:0 + db 0 ; base 23:16 + db 0 ; type + db 0 ; limit 19:16, flags + db 0 ; base 31:24 ; linear data segment descriptor LINEAR_SEL equ $-GDT_BASE - dw 0FFFFh ; limit 0xFFFFF - dw 0 ; base 0 - db 0 - db 092h ; present, ring 0, data, expand-up, writable - db 0CFh ; page-granular, 32-bit - db 0 + dw 0FFFFh ; limit 0xFFFFF + dw 0 ; base 0 + db 0 + db 092h ; present, ring 0, data, expand-up, writable + db 0CFh ; page-granular, 32-bit + db 0 ; linear code segment descriptor LINEAR_CODE_SEL equ $-GDT_BASE - dw 0FFFFh ; limit 0xFFFFF - dw 0 ; base 0 - db 0 - db 09Ah ; present, ring 0, data, expand-up, writable - db 0CFh ; page-granular, 32-bit - db 0 + dw 0FFFFh ; limit 0xFFFFF + dw 0 ; base 0 + db 0 + db 09Ah ; present, ring 0, data, expand-up, writable + db 0CFh ; page-granular, 32-bit + db 0 ; system data segment descriptor SYS_DATA_SEL equ $-GDT_BASE - dw 0FFFFh ; limit 0xFFFFF - dw 0 ; base 0 - db 0 - db 092h ; present, ring 0, data, expand-up, writable - db 0CFh ; page-granular, 32-bit - db 0 + dw 0FFFFh ; limit 0xFFFFF + dw 0 ; base 0 + db 0 + db 092h ; present, ring 0, data, expand-up, writable + db 0CFh ; page-granular, 32-bit + db 0 ; system code segment descriptor SYS_CODE_SEL equ $-GDT_BASE - dw 0FFFFh ; limit 0xFFFFF - dw 0 ; base 0 - db 0 - db 09Ah ; present, ring 0, data, expand-up, writable - db 0CFh ; page-granular, 32-bit - db 0 + dw 0FFFFh ; limit 0xFFFFF + dw 0 ; base 0 + db 0 + db 09Ah ; present, ring 0, data, expand-up, writable + db 0CFh ; page-granular, 32-bit + db 0 ; spare segment descriptor LINEAR_CODE64_SEL equ $-GDT_BASE - DW -1 ; LimitLow - DW 0 ; BaseLow - DB 0 ; BaseMid + DW -1 ; LimitLow + DW 0 ; BaseLow + DB 0 ; BaseMid DB 9bh - DB 0afh ; LimitHigh (CS.L=1, CS.D=0) - DB 0 ; BaseHigh + DB 0afh ; LimitHigh (CS.L=1, CS.D=0) + DB 0 ; BaseHigh ; spare segment descriptor SPARE4_SEL equ $-GDT_BASE - dw 0 ; limit 0xFFFFF - dw 0 ; base 0 - db 0 - db 0 ; present, ring 0, data, expand-up, writable - db 0 ; page-granular, 32-bit - db 0 + dw 0 ; limit 0xFFFFF + dw 0 ; base 0 + db 0 + db 0 ; present, ring 0, data, expand-up, writable + db 0 ; page-granular, 32-bit + db 0 ; spare segment descriptor SPARE5_SEL equ $-GDT_BASE - dw 0 ; limit 0xFFFFF - dw 0 ; base 0 - db 0 - db 0 ; present, ring 0, data, expand-up, writable - db 0 ; page-granular, 32-bit - db 0 + dw 0 ; limit 0xFFFFF + dw 0 ; base 0 + db 0 + db 0 ; present, ring 0, data, expand-up, writable + db 0 ; page-granular, 32-bit + db 0 GDT_END: diff --git a/OvmfPkg/ResetVector/Ia16/Init16.asm b/OvmfPkg/ResetVector/Ia16/Init16.asm new file mode 100644 index 0000000..3d3d8b0 --- /dev/null +++ b/OvmfPkg/ResetVector/Ia16/Init16.asm @@ -0,0 +1,48 @@ +;------------------------------------------------------------------------------ +; @file +; 16-bit initialization code +; +; Copyright (c) 2008 - 2009, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + + +BITS 16 + +; +; @param[out] DI 'BP' to indicate boot-strap processor +; +EarlyBspInitReal16: + mov di, 'BP' + jmp short Main16 + +; +; @param[out] DI 'AP' to indicate application processor +; +EarlyApInitReal16: + mov di, 'AP' + jmp short Main16 + +; +; Modified: EAX +; +; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test) +; @param[out] ESP Initial value of the EAX register (BIST: Built-in Self Test) +; +EarlyInit16: + ; + ; ESP - Initial value of the EAX register (BIST: Built-in Self Test) + ; + mov esp, eax + + debugInitialize + + OneTimeCallRet EarlyInit16 + diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm deleted file mode 100644 index 75e259b..0000000 --- a/OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm +++ /dev/null @@ -1,51 +0,0 @@ -;------------------------------------------------------------------------------ -; -; Copyright (c) 2008, Intel Corporation -; All rights reserved. This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; Reset-16Bit-old-tools.asm -; -; Abstract: -; -; First code exectuted by processor after resetting. -; -;------------------------------------------------------------------------------ - -BITS 16 - -earlyInit_Real16: - - jmp real16InitSerialPort -real16SerialPortInitReturn: - - jmp to32BitFlat - -ALIGN 16 - -; -; Junk data. Old GenFv tool will modify data here. -; - DQ 0, 0 - -; -; Reset Vector -; -; This is where the processor will begin execution -; - jmp short earlyInit_Real16 - -; -; Junk data. Old GenFv tool will modify data here. -; -ALIGN 16 - -fourGigabytes: - diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm index 63aeaf6..0eff743 100644 --- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm +++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm @@ -1,6 +1,8 @@ ;------------------------------------------------------------------------------ +; @file +; First code exectuted by processor after resetting. ; -; Copyright (c) 2008, Intel Corporation +; Copyright (c) 2008 - 2009, Intel Corporation ; All rights reserved. This program and the accompanying materials ; are licensed and made available under the terms and conditions of the BSD License ; which accompanies this distribution. The full text of the license may be found at @@ -9,28 +11,25 @@ ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; -; Module Name: -; -; Reset-16Bit-vft0.asm -; -; Abstract: -; -; First code exectuted by processor after resetting. -; ;------------------------------------------------------------------------------ -BITS 16 - -earlyInit_Real16: +BITS 16 - jmp real16InitSerialPort -real16SerialPortInitReturn: +ALIGN 16 - jmp to32BitFlat +applicationProcessorEntryPoint: +; +; Application Processors entry point +; +; GenFv generates code aligned on a 4k boundary which will jump to this +; location. (0xffffffe0) This allows the Local APIC Startup IPI to be +; used to wake up the application processors. +; + jmp short EarlyApInitReal16 -ALIGN 16 +ALIGN 8 - DD 0, 0, 0 + DD 0 ; ; The VTF signature @@ -39,16 +38,20 @@ ALIGN 16 ; any fixups. ; vtfSignature: - DB 'V', 'T', 'F', 0 + DB 'V', 'T', 'F', 0 + +ALIGN 16 +resetVector: ; ; Reset Vector ; ; This is where the processor will begin execution ; - jmp short earlyInit_Real16 + wbinvd + jmp short EarlyBspInitReal16 -ALIGN 16 +ALIGN 16 fourGigabytes: diff --git a/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm b/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm index f0528d4..a97f9cc 100644 --- a/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm +++ b/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm @@ -1,6 +1,8 @@ ;------------------------------------------------------------------------------ +; @file +; Transition from 32 bit flat protected mode into 64 bit flat protected mode ; -; Copyright (c) 2008, Intel Corporation +; Copyright (c) 2008 - 2009, Intel Corporation ; All rights reserved. This program and the accompanying materials ; are licensed and made available under the terms and conditions of the BSD License ; which accompanies this distribution. The full text of the license may be found at @@ -9,18 +11,13 @@ ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; -; Module Name: -; -; 32FlatTo64Flat.asm -; -; Abstract: -; -; Transition from 32 bit flat protected mode into 64 bit flat protected mode -; ;------------------------------------------------------------------------------ BITS 32 +; +; Modified: EAX +; Transition32FlatTo64Flat: mov eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000) @@ -43,9 +40,7 @@ Transition32FlatTo64Flat: BITS 64 jumpTo64BitAndLandHere: - writeToSerialPort '6' - writeToSerialPort '4' - writeToSerialPort ' ' + debugShowPostCode POSTCODE_64BIT_MODE OneTimeCallRet Transition32FlatTo64Flat diff --git a/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm b/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm index e6ca6e6..21b64f4 100644 --- a/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm +++ b/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm @@ -1,6 +1,8 @@ ;------------------------------------------------------------------------------ +; @file +; Search for the Boot Firmware Volume (BFV) base address ; -; Copyright (c) 2008, Intel Corporation +; Copyright (c) 2008 - 2009, Intel Corporation ; All rights reserved. This program and the accompanying materials ; are licensed and made available under the terms and conditions of the BSD License ; which accompanies this distribution. The full text of the license may be found at @@ -9,14 +11,6 @@ ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; -; Module Name: -; -; SearchForBfvBase.asm -; -; Abstract: -; -; Search for the Boot FV Base Address -; ;------------------------------------------------------------------------------ ;#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \ @@ -29,21 +23,21 @@ BITS 32 ; -; Input: -; None +; Modified: EAX, EBX +; Preserved: EDI, ESP ; -; Output: -; EBP - BFV Base Address -; -; Modified: -; EAX, EBX +; @param[out] EBP Address of Boot Firmware Volume (BFV) ; Flat32SearchForBfvBase: xor eax, eax searchingForBfvHeaderLoop: + ; + ; We check for a firmware volume at every 4KB address in the top 16MB + ; just below 4GB. (Addresses at 0xffHHH000 where H is any hex digit.) + ; sub eax, 0x1000 - cmp eax, 0xff800000 + cmp eax, 0xff000000 jb searchedForBfvHeaderButNotFound ; @@ -70,19 +64,23 @@ searchingForBfvHeaderLoop: jmp searchedForBfvHeaderAndItWasFound searchedForBfvHeaderButNotFound: - writeToSerialPort '!' - xor eax, eax + ; + ; Hang if the SEC entry point was not found + ; + debugShowPostCode POSTCODE_BFV_NOT_FOUND -searchedForBfvHeaderAndItWasFound: + ; + ; 0xbfbfbfbf in the EAX & EBP registers helps signal what failed + ; for debugging purposes. + ; + mov eax, 0xBFBFBFBF mov ebp, eax + jmp $ - writeToSerialPort 'B' - writeToSerialPort 'F' - writeToSerialPort 'V' - writeToSerialPort ' ' +searchedForBfvHeaderAndItWasFound: + mov ebp, eax - or ebp, ebp - jz $ + debugShowPostCode POSTCODE_BFV_FOUND OneTimeCallRet Flat32SearchForBfvBase diff --git a/OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm b/OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm deleted file mode 100644 index 9bb0cd1..0000000 --- a/OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm +++ /dev/null @@ -1,222 +0,0 @@ -;------------------------------------------------------------------------------ -; -; Copyright (c) 2008, Intel Corporation -; All rights reserved. This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; SearchForSecAndPeiEntry.asm -; -; Abstract: -; -; Search for the SEC Core and PEI Core entry points -; -;------------------------------------------------------------------------------ - -BITS 32 - -%define EFI_FV_FILETYPE_SECURITY_CORE 0x03 -%define EFI_FV_FILETYPE_PEI_CORE 0x04 - -; -; Input: -; EBP - BFV Base Address -; -; Output: -; ESI - SEC Core Entry Point Address (or 0 if not found) -; EDI - PEI Core Entry Point Address (or 0 if not found) -; -; Modified: -; EAX, EBX, ECX -; -Flat32SearchForSecAndPeiEntries: - - ; - ; Initialize EBP and ESI to 0 - ; - xor ebx, ebx - mov esi, ebx - mov edi, ebx - - ; - ; Pass over the BFV header - ; - mov eax, ebp - mov bx, [ebp + 0x30] - add eax, ebx - jc doneSeachingForSecAndPeiEntries - - jmp searchingForFfsFileHeaderLoop - -moveForwardWhileSearchingForFfsFileHeaderLoop: - ; - ; Make forward progress in the search - ; - inc eax - jc doneSeachingForSecAndPeiEntries - -searchingForFfsFileHeaderLoop: - test eax, eax - jz doneSeachingForSecAndPeiEntries - - ; - ; Ensure 8 byte alignment - ; - add eax, 7 - jc doneSeachingForSecAndPeiEntries - and al, 0xf8 - - ; - ; Look to see if there is an FFS file at eax - ; - mov bl, [eax + 0x17] - test bl, 0x20 - jz moveForwardWhileSearchingForFfsFileHeaderLoop - mov ecx, [eax + 0x14] - and ecx, 0x00ffffff - or ecx, ecx - jz moveForwardWhileSearchingForFfsFileHeaderLoop -; jmp $ - add ecx, eax - jz jumpSinceWeFoundTheLastFfsFile - jc moveForwardWhileSearchingForFfsFileHeaderLoop -jumpSinceWeFoundTheLastFfsFile: - - ; - ; There seems to be a valid file at eax - ; - mov bl, [eax + 0x12] ; BL - File Type - cmp bl, EFI_FV_FILETYPE_PEI_CORE - je fileTypeIsPeiCore - cmp bl, EFI_FV_FILETYPE_SECURITY_CORE - jne readyToTryFfsFileAtEcx - -fileTypeIsSecCore: - callEdx GetEntryPointOfFfsFileReturnEdx - test eax, eax - jz readyToTryFfsFileAtEcx - - mov esi, eax - jmp readyToTryFfsFileAtEcx - -fileTypeIsPeiCore: - callEdx GetEntryPointOfFfsFileReturnEdx - test eax, eax - jz readyToTryFfsFileAtEcx - - mov edi, eax - -readyToTryFfsFileAtEcx: - mov eax, ecx - jmp searchingForFfsFileHeaderLoop - -doneSeachingForSecAndPeiEntries: - - test esi, esi - jnz secCoreEntryPointWasFound - writeToSerialPort '!' -secCoreEntryPointWasFound: - writeToSerialPort 'S' - writeToSerialPort 'E' - writeToSerialPort 'C' - writeToSerialPort ' ' - - test edi, edi - jnz peiCoreEntryPointWasFound - writeToSerialPort '!' -peiCoreEntryPointWasFound: - writeToSerialPort 'P' - writeToSerialPort 'E' - writeToSerialPort 'I' - writeToSerialPort ' ' - - OneTimeCallRet Flat32SearchForSecAndPeiEntries - - -%define EFI_SECTION_PE32 0x10 - -; -; Input: -; EAX - Start of FFS file -; ECX - End of FFS file -; -; Output: -; EAX - Entry point of PE32 (or 0 if not found) -; -; Modified: -; EBX -; -GetEntryPointOfFfsFileReturnEdx: - test eax, eax - jz getEntryPointOfFfsFileErrorReturn - add eax, 0x18 ; EAX = Start of section - -getEntryPointOfFfsFileLoopForSections: - cmp eax, ecx - jae getEntryPointOfFfsFileErrorReturn - - cmp byte [eax + 3], EFI_SECTION_PE32 - je getEntryPointOfFfsFileFoundPe32Section - - ; - ; The section type was not PE32, so move to next section - ; - mov ebx, dword [eax] - and ebx, 0x00ffffff - add eax, ebx - jc getEntryPointOfFfsFileErrorReturn - - ; - ; Ensure that FFS section is 32-bit aligned - ; - add eax, 3 - jc getEntryPointOfFfsFileErrorReturn - and al, 0xfc - jmp getEntryPointOfFfsFileLoopForSections - -getEntryPointOfFfsFileFoundPe32Section: - add eax, 4 ; EAX = Start of PE32 image - - mov ebx, eax - cmp word [eax], 'MZ' - jne thereIsNotAnMzSignature - movzx ebx, word [eax + 0x3c] - add ebx, eax -thereIsNotAnMzSignature: - - ; if (Hdr.Te->Signature == EFI_TE_IMAGE_HEADER_SIGNATURE) - cmp word [ebx], 'VZ' - jne thereIsNoVzSignature - ; *EntryPoint = (VOID *)((UINTN)Pe32Data + - ; (UINTN)(Hdr.Te->AddressOfEntryPoint & 0x0ffffffff) + - ; sizeof(EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize); - add eax, [ebx + 0x8] - add eax, 0x28 - movzx ebx, word [ebx + 0x6] - sub eax, ebx - jmp getEntryPointOfFfsFileReturn - -thereIsNoVzSignature: - - ; if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) - cmp dword [ebx], `PE\x00\x00` - jne getEntryPointOfFfsFileErrorReturn - - ; *EntryPoint = (VOID *)((UINTN)Pe32Data + - ; (UINTN)(Hdr.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff)); - add eax, [ebx + 0x4 + 0x14 + 0x10] - jmp getEntryPointOfFfsFileReturn - -getEntryPointOfFfsFileErrorReturn: - mov eax, 0 - -getEntryPointOfFfsFileReturn: - jmp edx - - diff --git a/OvmfPkg/ResetVector/Ia32/SearchForSecEntry.asm b/OvmfPkg/ResetVector/Ia32/SearchForSecEntry.asm new file mode 100644 index 0000000..01d0519 --- /dev/null +++ b/OvmfPkg/ResetVector/Ia32/SearchForSecEntry.asm @@ -0,0 +1,196 @@ +;------------------------------------------------------------------------------ +; @file +; Search for the SEC Core entry point +; +; Copyright (c) 2008 - 2009, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + +BITS 32 + +%define EFI_FV_FILETYPE_SECURITY_CORE 0x03 + +; +; Modified: EAX, EBX, ECX, EDX +; Preserved: EDI, EBP, ESP +; +; @param[in] EBP Address of Boot Firmware Volume (BFV) +; @param[out] ESI SEC Core Entry Point Address +; +Flat32SearchForSecEntryPoint: + + ; + ; Initialize EBP and ESI to 0 + ; + xor ebx, ebx + mov esi, ebx + + ; + ; Pass over the BFV header + ; + mov eax, ebp + mov bx, [ebp + 0x30] + add eax, ebx + jc secEntryPointWasNotFound + + jmp searchingForFfsFileHeaderLoop + +moveForwardWhileSearchingForFfsFileHeaderLoop: + ; + ; Make forward progress in the search + ; + inc eax + jc secEntryPointWasNotFound + +searchingForFfsFileHeaderLoop: + test eax, eax + jz secEntryPointWasNotFound + + ; + ; Ensure 8 byte alignment + ; + add eax, 7 + jc secEntryPointWasNotFound + and al, 0xf8 + + ; + ; Look to see if there is an FFS file at eax + ; + mov bl, [eax + 0x17] + test bl, 0x20 + jz moveForwardWhileSearchingForFfsFileHeaderLoop + mov ecx, [eax + 0x14] + and ecx, 0x00ffffff + or ecx, ecx + jz moveForwardWhileSearchingForFfsFileHeaderLoop + add ecx, eax + jz jumpSinceWeFoundTheLastFfsFile + jc moveForwardWhileSearchingForFfsFileHeaderLoop +jumpSinceWeFoundTheLastFfsFile: + + ; + ; There seems to be a valid file at eax + ; + cmp byte [eax + 0x12], EFI_FV_FILETYPE_SECURITY_CORE ; Check File Type + jne readyToTryFfsFileAtEcx + +fileTypeIsSecCore: + OneTimeCall GetEntryPointOfFfsFile + test eax, eax + jnz doneSeachingForSecEntryPoint + +readyToTryFfsFileAtEcx: + ; + ; Try the next FFS file at ECX + ; + mov eax, ecx + jmp searchingForFfsFileHeaderLoop + +secEntryPointWasNotFound: + xor eax, eax + +doneSeachingForSecEntryPoint: + mov esi, eax + + test esi, esi + jnz secCoreEntryPointWasFound + +secCoreEntryPointWasNotFound: + ; + ; Hang if the SEC entry point was not found + ; + debugShowPostCode POSTCODE_SEC_NOT_FOUND + jz $ + +secCoreEntryPointWasFound: + debugShowPostCode POSTCODE_SEC_FOUND + + OneTimeCallRet Flat32SearchForSecEntryPoint + +%define EFI_SECTION_PE32 0x10 + +; +; Input: +; EAX - Start of FFS file +; ECX - End of FFS file +; +; Output: +; EAX - Entry point of PE32 (or 0 if not found) +; +; Modified: +; EBX +; +GetEntryPointOfFfsFile: + test eax, eax + jz getEntryPointOfFfsFileErrorReturn + add eax, 0x18 ; EAX = Start of section + +getEntryPointOfFfsFileLoopForSections: + cmp eax, ecx + jae getEntryPointOfFfsFileErrorReturn + + cmp byte [eax + 3], EFI_SECTION_PE32 + je getEntryPointOfFfsFileFoundPe32Section + + ; + ; The section type was not PE32, so move to next section + ; + mov ebx, dword [eax] + and ebx, 0x00ffffff + add eax, ebx + jc getEntryPointOfFfsFileErrorReturn + + ; + ; Ensure that FFS section is 32-bit aligned + ; + add eax, 3 + jc getEntryPointOfFfsFileErrorReturn + and al, 0xfc + jmp getEntryPointOfFfsFileLoopForSections + +getEntryPointOfFfsFileFoundPe32Section: + add eax, 4 ; EAX = Start of PE32 image + + mov ebx, eax + cmp word [eax], 'MZ' + jne thereIsNotAnMzSignature + movzx ebx, word [eax + 0x3c] + add ebx, eax +thereIsNotAnMzSignature: + + ; if (Hdr.Te->Signature == EFI_TE_IMAGE_HEADER_SIGNATURE) + cmp word [ebx], 'VZ' + jne thereIsNoVzSignature + ; *EntryPoint = (VOID *)((UINTN)Pe32Data + + ; (UINTN)(Hdr.Te->AddressOfEntryPoint & 0x0ffffffff) + + ; sizeof(EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize); + add eax, [ebx + 0x8] + add eax, 0x28 + movzx ebx, word [ebx + 0x6] + sub eax, ebx + jmp getEntryPointOfFfsFileReturn + +thereIsNoVzSignature: + + ; if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) + cmp dword [ebx], `PE\x00\x00` + jne getEntryPointOfFfsFileErrorReturn + + ; *EntryPoint = (VOID *)((UINTN)Pe32Data + + ; (UINTN)(Hdr.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff)); + add eax, [ebx + 0x4 + 0x14 + 0x10] + jmp getEntryPointOfFfsFileReturn + +getEntryPointOfFfsFileErrorReturn: + mov eax, 0 + +getEntryPointOfFfsFileReturn: + OneTimeCallRet GetEntryPointOfFfsFile + diff --git a/OvmfPkg/ResetVector/JumpToSec.asm b/OvmfPkg/ResetVector/JumpToSec.asm deleted file mode 100644 index d7442f0..0000000 --- a/OvmfPkg/ResetVector/JumpToSec.asm +++ /dev/null @@ -1,63 +0,0 @@ -;------------------------------------------------------------------------------ -; -; Copyright (c) 2008, Intel Corporation -; All rights reserved. This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; Module Name: -; -; JumpToSec.asm -; -; Abstract: -; -; Jump from the reset vector binary to SEC -; -;------------------------------------------------------------------------------ - -BITS 32 - -TransitionFrom16RealTo32FlatComplete: - - OneTimeCall Flat32SearchForBfvBase - - OneTimeCall Flat32SearchForSecAndPeiEntries - - ; - ; ESI - SEC Core entry point - ; EDI - PEI Core entry point - ; EBP - Start of BFV - ; - ; Jump to SEC Core entry point - ; - -%ifdef ARCH_IA32 - - jmp esi - -%else - - OneTimeCall Transition32FlatTo64Flat -BITS 64 - - mov rax, 0x00000000ffffffff - and rsi, rax - and rdi, rax - and rbp, rax - ; - ; RSI - SEC Core entry point - ; RDI - PEI Core entry point - ; RBP - Start of BFV - ; - ; Jump to SEC Core entry point - ; - - jmp rsi - -%endif - - diff --git a/OvmfPkg/ResetVector/Main.asm b/OvmfPkg/ResetVector/Main.asm new file mode 100644 index 0000000..bc2a3b1 --- /dev/null +++ b/OvmfPkg/ResetVector/Main.asm @@ -0,0 +1,106 @@ +;------------------------------------------------------------------------------ +; @file +; Main routine of the pre-SEC code up through the jump into SEC +; +; Copyright (c) 2008 - 2009, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + + +BITS 16 + +; +; Modified: EBX, ECX, EDX, EBP +; +; @param[in,out] RAX/EAX Initial value of the EAX register +; (BIST: Built-in Self Test) +; @param[in,out] DI 'BP': boot-strap processor, or +; 'AP': application processor +; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV) +; +; @return None This routine jumps to SEC and does not return +; +Main16: + OneTimeCall EarlyInit16 + + ; + ; Transition the processor from 16-bit real mode to 32-bit flat mode + ; + OneTimeCall TransitionFromReal16To32BitFlat + +BITS 32 + + ; + ; Search for the Boot Firmware Volume (BFV) + ; + OneTimeCall Flat32SearchForBfvBase + + ; + ; EBP - Start of BFV + ; + + ; + ; Search for the SEC entry point + ; + OneTimeCall Flat32SearchForSecEntryPoint + + ; + ; ESI - SEC Core entry point + ; EBP - Start of BFV + ; + +%ifdef ARCH_IA32 + + ; + ; Restore initial EAX value into the EAX register + ; + mov eax, esp + + ; + ; Jump to the 32-bit SEC entry point + ; + jmp esi + +%else + + ; + ; Transition the processor from 32-bit flat mode to 64-bit flat mode + ; + OneTimeCall Transition32FlatTo64Flat + +BITS 64 + + ; + ; Some values were calculated in 32-bit mode. Make sure the upper + ; 32-bits of 64-bit registers are zero for these values. + ; + mov rax, 0x00000000ffffffff + and rsi, rax + and rbp, rax + and rsp, rax + + ; + ; RSI - SEC Core entry point + ; RBP - Start of BFV + ; + + ; + ; Restore initial EAX value into the RAX register + ; + mov rax, rsp + + ; + ; Jump to the 64-bit SEC entry point + ; + jmp rsi + +%endif + + diff --git a/OvmfPkg/ResetVector/Port80Debug.asm b/OvmfPkg/ResetVector/Port80Debug.asm new file mode 100644 index 0000000..2f9d086 --- /dev/null +++ b/OvmfPkg/ResetVector/Port80Debug.asm @@ -0,0 +1,28 @@ +;------------------------------------------------------------------------------ +; @file +; Port 0x80 debug support macros +; +; Copyright (c) 2009, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + +BITS 16 + +%macro debugInitialize 0 + ; + ; No initialization is required + ; +%endmacro + +%macro debugShowPostCode 1 + mov al, %1 + out 0x80, al +%endmacro + diff --git a/OvmfPkg/ResetVector/PostCodes.inc b/OvmfPkg/ResetVector/PostCodes.inc new file mode 100644 index 0000000..2556aed --- /dev/null +++ b/OvmfPkg/ResetVector/PostCodes.inc @@ -0,0 +1,25 @@ +;------------------------------------------------------------------------------ +; @file +; Definitions of POST CODES for the reset vector module +; +; Copyright (c) 2009, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + +%define POSTCODE_16BIT_MODE 0x16 +%define POSTCODE_32BIT_MODE 0x32 +%define POSTCODE_64BIT_MODE 0x64 + +%define POSTCODE_BFV_NOT_FOUND 0xb0 +%define POSTCODE_BFV_FOUND 0xb1 + +%define POSTCODE_SEC_NOT_FOUND 0xf0 +%define POSTCODE_SEC_FOUND 0xf1 + diff --git a/OvmfPkg/ResetVector/ResetVectorCode.asm b/OvmfPkg/ResetVector/ResetVectorCode.asm index 4339505..8b13942 100644 --- a/OvmfPkg/ResetVector/ResetVectorCode.asm +++ b/OvmfPkg/ResetVector/ResetVectorCode.asm @@ -1,6 +1,8 @@ ;------------------------------------------------------------------------------ +; @file +; This file includes all other code files to assemble the reset vector code ; -; Copyright (c) 2008, Intel Corporation +; Copyright (c) 2008 - 2009, Intel Corporation ; All rights reserved. This program and the accompanying materials ; are licensed and made available under the terms and conditions of the BSD License ; which accompanies this distribution. The full text of the license may be found at @@ -9,14 +11,6 @@ ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; -; Module Name: -; -; ResetVectorCode.asm -; -; Abstract: -; -; Create code for VTF raw section. -; ;------------------------------------------------------------------------------ %ifdef ARCH_IA32 @@ -29,15 +23,30 @@ %endif %include "CommonMacros.inc" -%include "SerialDebug.asm" + +%include "PostCodes.inc" + +%ifdef DEBUG_NONE + %include "DebugDisabled.asm" +%elifdef DEBUG_PORT80 + %include "Port80Debug.asm" +%elifdef DEBUG_SERIAL + %include "SerialDebug.asm" +%else + %error "No debug type was specified." +%endif + %include "Ia32/SearchForBfvBase.asm" -%include "Ia32/SearchForSecAndPeiEntries.asm" -%include "JumpToSec.asm" -%include "Ia16/16RealTo32Flat.asm" +%include "Ia32/SearchForSecEntry.asm" %ifdef ARCH_X64 %include "Ia32/32FlatTo64Flat.asm" %endif +%include "Ia16/16RealTo32Flat.asm" +%include "Ia16/Init16.asm" + +%include "Main.asm" + %include "Ia16/ResetVectorVtf0.asm" diff --git a/OvmfPkg/ResetVector/SerialDebug.asm b/OvmfPkg/ResetVector/SerialDebug.asm index 2959fa5..8c2ffc6 100644 --- a/OvmfPkg/ResetVector/SerialDebug.asm +++ b/OvmfPkg/ResetVector/SerialDebug.asm @@ -1,6 +1,8 @@ ;------------------------------------------------------------------------------ +; @file +; Serial port debug support macros ; -; Copyright (c) 2008, Intel Corporation +; Copyright (c) 2008 - 2009, Intel Corporation ; All rights reserved. This program and the accompanying materials ; are licensed and made available under the terms and conditions of the BSD License ; which accompanies this distribution. The full text of the license may be found at @@ -9,18 +11,8 @@ ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; -; Module Name: -; -; SerialDebug.asm -; -; Abstract: -; -; Serial port support macros -; ;------------------------------------------------------------------------------ -BITS 16 - ;//--------------------------------------------- ;// UART Register Offsets ;//--------------------------------------------- @@ -88,12 +80,38 @@ BITS 16 out dx, al %endmacro -%macro writeToSerialPort 1 +%macro debugShowCharacter 1 waitForSerialTxReady outToSerialPort 0, %1 %endmacro -real16InitSerialPort: +%macro debugShowHexDigit 1 + %if (%1 < 0xa) + debugShowCharacter BYTE ('0' + (%1)) + %else + debugShowCharacter BYTE ('a' + ((%1) - 0xa)) + %endif +%endmacro + +%macro debugNewline 0 + debugShowCharacter `\r` + debugShowCharacter `\n` +%endmacro + +%macro debugShowPostCode 1 + debugShowHexDigit (((%1) >> 4) & 0xf) + debugShowHexDigit ((%1) & 0xf) + debugNewline +%endmacro + +BITS 16 + +%macro debugInitialize 0 + jmp real16InitDebug +real16InitDebugReturn: +%endmacro + +real16InitDebug: ; ; Set communications format ; @@ -110,5 +128,5 @@ real16InitSerialPort: ; outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR - jmp real16SerialPortInitReturn + jmp real16InitDebugReturn -- cgit v1.1