From f88f0fb67b9763a4f1f9d55b25e9bcc2d88b1e32 Mon Sep 17 00:00:00 2001 From: eric_tian Date: Fri, 18 Jul 2008 02:31:09 +0000 Subject: replace PCI Root Bridge I/O protocol with PciLib to achieve M2 qulity. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5515 6f19259b-4bc3-4df7-8a09-765794883524 --- .../FaultTolerantWriteDxe/FtwLite.inf | 12 +--- .../FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c | 71 +++------------------- 2 files changed, 8 insertions(+), 75 deletions(-) (limited to 'MdeModulePkg/Universal/FirmwareVolume') diff --git a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/FtwLite.inf b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/FtwLite.inf index 3ec4321..399febb 100644 --- a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/FtwLite.inf +++ b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/FtwLite.inf @@ -2,7 +2,7 @@ # Component description file for FtwLite module. # # This driver provides fault tolerant write capability for block devices. -# Copyright (c) 2006 - 2007, Intel Corporation +# Copyright (c) 2006 - 2008, Intel Corporation # # All rights reserved. This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -49,13 +49,10 @@ [Sources.EBC] Ia32/Ia32FtwMisc.c - [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec - - [LibraryClasses] UefiBootServicesTableLib MemoryAllocationLib @@ -72,13 +69,6 @@ gEfiFirmwareVolumeBlockProtocolGuid # PROTOCOL ALWAYS_CONSUMED gEfiFaultTolerantWriteLiteProtocolGuid # PROTOCOL ALWAYS_PRODUCED -[Protocols.IA32] - gEfiPciRootBridgeIoProtocolGuid # PROTOCOL ALWAYS_CONSUMED - -[Protocols.EBC] - gEfiPciRootBridgeIoProtocolGuid # PROTOCOL ALWAYS_CONSUMED - - [Pcd.common] gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase diff --git a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c index 2c359b2..3893a6c 100644 --- a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c +++ b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c @@ -35,51 +35,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. /** - Read PCI register value. - This is a internal function. - - - @param Offset Offset of the register - - @return The pci register value. - -**/ -UINT32 -ReadPciRegister ( - IN UINT32 Offset - ) -{ - EFI_STATUS Status; - UINT32 Value; - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo; - - Value = 0; - Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &PciRootBridgeIo); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "FtwLite: Locate PCI root bridge io protocol - %r", Status)); - return 0; - } - - Status = PciRootBridgeIo->Pci.Read ( - PciRootBridgeIo, - EfiPciWidthUint32, - EFI_PCI_ADDRESS ( - LPC_BUS_NUMBER, - LPC_DEVICE_NUMBER, - LPC_IF, - Offset - ), - 1, - &Value - ); - ASSERT_EFI_ERROR (Status); - - return Value; -} - -/** - - Get swap state + Get swap state. This is a internal function. @@ -95,10 +51,13 @@ GetSwapState ( OUT BOOLEAN *SwapState ) { + UINT32 Value; + Value = PciRead32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS)) + // // Top swap status is 13 bit // - *SwapState = (BOOLEAN) ((ReadPciRegister (GEN_STATUS) & TOP_SWAP_BIT) != 0); + *SwapState = (BOOLEAN) ((Value & TOP_SWAP_BIT) != 0); return EFI_SUCCESS; } @@ -131,7 +90,7 @@ SetSwapState ( // // Top-Swap bit (bit 13, D31: F0, Offset D4h) // - GenStatus = ReadPciRegister (GEN_STATUS); + GenStatus = PciRead32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS)); // // Set 13 bit, according to input NewSwapState @@ -142,26 +101,10 @@ SetSwapState ( GenStatus &= ~TOP_SWAP_BIT; } - Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &PciRootBridgeIo); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "FtwLite: Locate PCI root bridge io protocol - %r", Status)); - return Status; - } // // Write back the GenStatus register // - Status = PciRootBridgeIo->Pci.Write ( - PciRootBridgeIo, - EfiPciWidthUint32, - EFI_PCI_ADDRESS ( - LPC_BUS_NUMBER, - LPC_DEVICE_NUMBER, - LPC_IF, - GEN_STATUS - ), - 1, - &GenStatus - ); + PciWrite32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS), GenStatus); DEBUG_CODE_BEGIN (); if (TopSwap) { -- cgit v1.1