From db98a8bdb89afa29b4cedc9ffa29d3fca17e3ac9 Mon Sep 17 00:00:00 2001 From: Feng Tian Date: Mon, 11 Jul 2016 11:17:05 +0800 Subject: MdeModulePkg/XhciDxe: fix a bug on TRB check in async int transfer The last TRB in transfer ring is a LINK type TRB, which shouldn't be accounted as a valid item in IsAsyncIntTrb(). Without this fix, the original algo will bring issue on those URBs whose TRBs crosses the transfer ring. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian Reviewed-by: Star Zeng --- MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c index 1130b6a..b6078b1 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c @@ -1009,7 +1009,11 @@ IsAsyncIntTrb ( return TRUE; } CheckedTrb++; - if ((UINTN)CheckedTrb >= ((UINTN) CheckedUrb->Ring->RingSeg0 + sizeof (TRB_TEMPLATE) * CheckedUrb->Ring->TrbNumber)) { + // + // If the checked TRB is the link TRB at the end of the transfer ring, + // recircle it to the head of the ring. + // + if (CheckedTrb->Type == TRB_TYPE_LINK) { CheckedTrb = (TRB_TEMPLATE*) CheckedUrb->Ring->RingSeg0; } } -- cgit v1.1