From 0fba57da65ea12eda18203cda52766888cbe95fe Mon Sep 17 00:00:00 2001 From: "Liu, Zhiguang" Date: Mon, 8 May 2023 16:15:02 +0800 Subject: UefiCpuPkg/ResetVector: Combine PageTables1G.asm and PageTables2M.asm Combine PageTables1G.asm and PageTables2M.asm to reuse code. Cc: Eric Dong Reviewed-by: Ray Ni Cc: Rahul Kumar Tested-by: Gerd Hoffmann Acked-by: Gerd Hoffmann Cc: Debkumar De Cc: Catharine West Signed-off-by: Zhiguang Liu --- UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-- UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm | 83 ++++++++++++++++++++++++ UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm | 59 ----------------- UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm | 63 ------------------ 4 files changed, 85 insertions(+), 128 deletions(-) create mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb index bdea1fb..136361e 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb +++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb @@ -2,7 +2,7 @@ ; @file ; This file includes all other code files to assemble the reset vector code ; -; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.
+; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ;------------------------------------------------------------------------------ @@ -38,11 +38,7 @@ %include "PageTables.inc" %ifdef ARCH_X64 - %ifdef PAGE_TABLE_1G - %include "X64/PageTables1G.asm" - %else - %include "X64/PageTables2M.asm" - %endif + %include "X64/PageTables.asm" %endif %ifdef DEBUG_PORT80 diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm new file mode 100644 index 0000000..9b492b0 --- /dev/null +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm @@ -0,0 +1,83 @@ +;------------------------------------------------------------------------------ +; @file +; Emits Page Tables for 1:1 mapping. +; If using 1G page table, map addresses 0 - 0x8000000000 (512GB), +; else, map addresses 0 - 0x100000000 (4GB) +; +; Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent +; +;------------------------------------------------------------------------------ + +BITS 64 + +%define ALIGN_TOP_TO_4K_FOR_PAGING + +; +; Page table non-leaf entry attribute +; +%define PAGE_NLE_ATTR (PAGE_ACCESSED + \ + PAGE_READ_WRITE + \ + PAGE_PRESENT) + +; +; Page table big leaf entry attribute: +; PDPTE 1GB entry or PDE 2MB entry +; +%define PAGE_BLE_ATTR (PAGE_ACCESSED + \ + PAGE_READ_WRITE + \ + PAGE_DIRTY + \ + PAGE_PRESENT + \ + PAGE_SIZE) + +; +; Page table non-leaf entry +; +%define PAGE_NLE(address) (ADDR_OF(address) + \ + PAGE_NLE_ATTR) + +%define PAGE_PDPTE_1GB(x) ((x << 30) + PAGE_BLE_ATTR) +%define PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR) + +ALIGN 16 + +Pml4: + ; + ; PML4 (1 * 512GB entry) + ; + DQ PAGE_NLE(Pdp) + TIMES 0x1000 - ($ - Pml4) DB 0 + +%ifdef PAGE_TABLE_1G +Pdp: + ; + ; Page-directory pointer table (512 * 1GB entries => 512GB) + ; + %assign i 0 + %rep 512 + DQ PAGE_PDPTE_1GB(i) + %assign i i+1 + %endrep +%else +Pdp: + ; + ; Page-directory pointer table (4 * 1GB entries => 4GB) + ; + DQ PAGE_NLE(Pd) + DQ PAGE_NLE(Pd + 0x1000) + DQ PAGE_NLE(Pd + 0x2000) + DQ PAGE_NLE(Pd + 0x3000) + TIMES 0x1000 - ($ - Pdp) DB 0 + +Pd: + ; + ; Page-Directory (2048 * 2MB entries => 4GB) + ; Four pages below, each is pointed by one entry in Pdp. + ; + %assign i 0 + %rep 0x800 + DQ PAGE_PDE_2MB(i) + %assign i i+1 + %endrep +%endif +EndOfPageTables: diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm deleted file mode 100644 index f5b8da0..0000000 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm +++ /dev/null @@ -1,59 +0,0 @@ -;------------------------------------------------------------------------------ -; @file -; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB) -; -; Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.
-; SPDX-License-Identifier: BSD-2-Clause-Patent -; Linear-Address Translation to a 1-GByte Page -; -;------------------------------------------------------------------------------ - -BITS 64 - -%define ALIGN_TOP_TO_4K_FOR_PAGING - -; -; Page table non-leaf entry attribute -; -%define PAGE_NLE_ATTR (PAGE_ACCESSED + \ - PAGE_READ_WRITE + \ - PAGE_PRESENT) - -; -; Page table big leaf entry attribute: -; PDPTE 1GB entry or PDE 2MB entry -; -%define PAGE_BLE_ATTR (PAGE_ACCESSED + \ - PAGE_READ_WRITE + \ - PAGE_DIRTY + \ - PAGE_PRESENT + \ - PAGE_SIZE) - -; -; Page table non-leaf entry -; -%define PAGE_NLE(address) (ADDR_OF(address) + \ - PAGE_NLE_ATTR) - -%define PAGE_PDPTE_1GB(x) ((x << 30) + PAGE_BLE_ATTR) - -ALIGN 16 - -Pml4: - ; - ; PML4 (1 * 512GB entry) - ; - DQ PAGE_NLE(Pdp) - TIMES 0x1000 - ($ - Pml4) DB 0 - -Pdp: - ; - ; Page-directory pointer table (512 * 1GB entries => 512GB) - ; -%assign i 0 -%rep 512 - DQ PAGE_PDPTE_1GB(i) - %assign i i+1 -%endrep - -EndOfPageTables: diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm deleted file mode 100644 index 731daba..0000000 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm +++ /dev/null @@ -1,63 +0,0 @@ -;------------------------------------------------------------------------------ -; @file -; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4GB) -; -; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
-; SPDX-License-Identifier: BSD-2-Clause-Patent -; -;------------------------------------------------------------------------------ - -BITS 64 - -%define ALIGN_TOP_TO_4K_FOR_PAGING - -; -; Page table big leaf entry attribute: -; PDPTE 1GB entry or PDE 2MB entry -; -%define PAGE_BLE_ATTR (PAGE_SIZE + \ - PAGE_ACCESSED + \ - PAGE_DIRTY + \ - PAGE_READ_WRITE + \ - PAGE_PRESENT) - -; -; Page table non-leaf entry attribute -; -%define PAGE_NLE_ATTR (PAGE_ACCESSED + \ - PAGE_READ_WRITE + \ - PAGE_PRESENT) - -%define PAGE_NLE(address) (ADDR_OF(address) + \ - PAGE_NLE_ATTR) -%define PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR) - -Pml4: - ; - ; PML4 (1 * 512GB entry) - ; - DQ PAGE_NLE(Pdp) - TIMES 0x1000 - ($ - Pml4) DB 0 - -Pdp: - ; - ; Page-directory pointer table (4 * 1GB entries => 4GB) - ; - DQ PAGE_NLE(Pd) - DQ PAGE_NLE(Pd + 0x1000) - DQ PAGE_NLE(Pd + 0x2000) - DQ PAGE_NLE(Pd + 0x3000) - TIMES 0x1000 - ($ - Pdp) DB 0 - -Pd: - ; - ; Page-Directory (2048 * 2MB entries => 4GB) - ; Four pages below, each is pointed by one entry in Pdp. - ; -%assign i 0 -%rep 0x800 - DQ PAGE_PDE_2MB(i) - %assign i i+1 -%endrep - -EndOfPageTables: -- cgit v1.1