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2015-07-13UefiCpuPkg S3Resume2Pei: Fix ASSERT in WriteToOsS3PerformanceDataHao Wu1-1/+1
This commit will resolve the issue brought by r17744. AsciiStrCpyS (PerfData->Token, PERF_TOKEN_SIZE, Token); The above using of AsciiStrCpyS will cause ASSERT if Token is longer than PerfData->Token. Therefore, AsciiStrnCatS is used here to resolve the issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17934 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-08UefiCpuPkg/Library/CpuExceptionHandlerLib: Add exception type decoderJeff Fan4-15/+77
Add exception type decoder to print exception name string beside print exception type value. The exception names are from IA32 SDM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17877 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-30UefiCpuPkg S3Resume2Pei: Use safe string functionsHao Wu1-3/+2
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17744 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-19UefiCpuPkg/CpuDxe: NumberOfData is not BOOLEAN typeJeff Fan1-1/+1
Should check NumberOfData value instead of treat its value as one BOOLEAN type. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Shuming Qiu <shuming.qiu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17672 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-16UefiCpuPkg/CpuDxe: Get CPU BIST information from Guided HOBJeff Fan4-9/+108
Get CPU BIST information from gEfiSecPlatformInformation2PpiGuid or gEfiSecPlatformInformationPpiGuid Guided HOB and update the CPU healthy status for CPU MP Service. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17641 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27UefiCpuPkg/CpuExceptionHandlerLib: Support IA32 processors without DE or ↵Michael Kinney5-12/+59
FXSAVE/FXRESTOR Use CPUID Leaf 01 to detect support for debug extensions and FXSAVE/FXRESTOR instructions. Do not enable those features in CR4 if they are not supported. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17221 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseXApicX2ApicLib: Support IA32 processors without ↵Michael Kinney2-9/+67
MSR_IA32_APIC_BASE_ADDRESS Use Family from CPUID 01 to detect support for the Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS). If this MSR is not supported, then use Local APIC Base Address from the PCD PcdCpuLocalApicBaseAddress. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17217 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseXApicLib: Support IA32 processors without MSR_IA32_APIC_BASE_ADDRESSMichael Kinney2-11/+61
Use Family from CPUID 01 to detect support for the Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS). If this MSR is not supported, then use Local APIC Base Address from the PCD PcdCpuLocalApicBaseAddress. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17216 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-09UefiCpuPkg: Avoid "error A2085" when DDK3790 tool chain is usedScott Duplichan1-1/+2
The DDK3790 tool chain fails when the PAUSE instruction is assembled: error A2085: instruction or register not accepted in current CPU mode The solution is to use the .686 directive along with the .xmm directive. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17134 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-09UefiCpuPkg/MpSerivce: add volatile qualifiersChen Fan2-4/+4
For avoid the compiler optimizing the code, we let Parameter and Procedure in CpuData volatile. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17024 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-09UefiCpuPkg/MpService: Put APs to sleep when not busy.Chen Fan2-7/+58
Add a new sleeping state for APs, when no procedure execution, put AP to sleep. when need to execute procedure, only need to wake up this AP by sent SIPI. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17023 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-09UefiCpuPkg/MpService: put AP to busy state when executionChen Fan1-2/+7
CpuState should follow the process? Idle -> Ready -> Busy -> Finished ^ | | | + - - - - - - - - - - - - + Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17022 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-09UefiCpuPkg/MpService: fix trivial typo in cpu stateChen Fan2-2/+2
CpuStateBuzy => CpuStateBusy Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17021 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-03*/Contributions.txt: Update example email addressJordan Justen1-2/+2
Use the example.com domain as recommended in RFC 2606. NOTE: This does not modify the wording of the "TianoCore Contribution Agreement 1.0" section Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Bruce Cran <bruce.cran@gmail.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16724 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-16Refine the format of PCD in INF files for UefiCpuPkg.Shumin Qiu3-6/+6
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16617 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-17UefiCpuPkg CpuExceptionHandlerLib: Use %rax instead of %eax to make code ↵Jeff Fan1-6/+6
consistence. Make code consistence between ASM and S files. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16530 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-24Add typecast to fix VS2005 build issue.Jeff Fan1-3/+3
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16419 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-19UefiCpuPkg : Fix CpuDxe build issue with VS2005 tool chainJeff Fan1-3/+3
!!() cannot pass VS2005 build. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16404 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-17UefiCpuPkg/CpuDxe: Put APs in wait for SIPI state at ExitBootServicesChen Fan1-1/+33
when gBS->ExitBootServices() is called, the APs should avoid to access the unsafed buff datas which were allocated by boot services. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16397 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: install Mp Service protocolChen Fan1-0/+10
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16371 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: Startup APsJordan Justen1-0/+3
This sequence should happen: * CpuMp.c: Allocate a stack for the APs * ApStartup.c: Send Start IPI to wake APs in 16-bit real mode * MpAsm.S: AP enters CpuDxe driver code without stack - AP grabs a lock - AP sets up stack - AP calls CpuMp.c:ApEntryPointInC Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16370 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/MpService: avoid dead lock caused by CheckAllAPsStatusChen Fan1-24/+31
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16369 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/MpService: avoid reset AP still hold a lockChen Fan2-0/+10
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16368 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/MpService: free the unused cpu data bufferChen Fan1-3/+12
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16367 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: introduce ResetApStackless()Chen Fan3-5/+63
If timeout expires before AP returns from Procedure, the AP should be terminated, we introduce ResetApStackLess() to send init IPI to let AP exit Procedurce and re-available. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16366 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: split out StartupCode from StartApsStackless()Chen Fan3-18/+66
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16365 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/MpService: avoid next timer getting into CheckAllAPsStatus()Chen Fan1-1/+22
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16364 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/MpService: Simply Lock usageChen Fan1-42/+47
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16363 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/MpService: move settimer out to InitMpSystemDataChen Fan1-50/+78
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16362 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: Ap do loop routine to execute procedureChen Fan1-1/+32
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16361 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: implement Mp Services:SwitchBSP()Chen Fan2-1/+93
by now, SwitchBSP() always return UNSUPPORTED Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16360 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: implement Mp Services:StartupAllAPs()Chen Fan2-1/+595
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16359 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: implement Mp Protocol:StartupThisAP()Chen Fan2-1/+461
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16358 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: implement Mp Protocol:EnableDisableAP()Chen Fan2-1/+235
Due to the implementation of AcquireSpinLock() is not MP safe, so we should use AcquireSpinLockOrFail directly instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16357 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: implement Mp Services:GetProcessorInfo()Chen Fan2-1/+85
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16356 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: implement Mp Protocol:GetNumberOfProcessors()Chen Fan2-1/+125
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16355 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: implement Mp Protocol: WhoAmI()Chen Fan2-1/+81
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16354 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: introduce MP_SYSTEM_DATA for Mp Service ProtocolChen Fan4-10/+128
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16353 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: introduce EFI_MP_SERVICES_PROTOCOLChen Fan3-0/+13
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16352 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: Switch Ap Stack to NewStackChen Fan1-0/+29
All APs use the same common stack to initialization. after initialization, APs should switch to the stack of its own. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16351 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: introduce two PCD valueChen Fan3-1/+52
introduce PCD value: PcdCpuMaxLogicalProcessorNumber and PcdCpuApStackSize, used for initialize APs stacks. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16350 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: Add StartApsStackless routineJordan Justen4-0/+332
This routine starts the APs and directs them to run the specified code. The specified code is entered without a stack being available. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16349 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: Move GDT structures into CpuGdt.hJordan Justen2-51/+73
We'll want to use the structures for AP startup. Note: It seems previously we were not using '#pragma pack ()' in CpuGdt.c. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16348 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: Add stackless assembly AP entry pointsJordan Justen7-0/+326
The AP startup code simply jumps into this code with the CpuDxe driver without setting up a stack for the processor. Therefore, this code must setup the stack before calling into C code. This is the basic flow: * AP enters CpuDxe driver code (AsmApEntryPoint) without stack - AP grabs a lock - AP sets up stack - AP calls CpuMp.c:ApEntryPointInC - If ApEntryPointInC returns, the lock is freed, and another AP may run - The AP C code may call AsmApDoneWithCommonStack to indicate that the AP is no longer using the stack, and another may therefore proceed to use the stack and then call ApEntryPointInC Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16347 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: Add ApEntryPointInCJordan Justen1-0/+13
This is the function the AP assembly code will expect to call after getting a lock and setting up the stack. Only one AP will enter this routine at a time. If ApEntryPointInC exits, then the assembly code will loop around to grab the lock, setup the stack, and call ApEntryPointInC again. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16346 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-13UefiCpuPkg/CpuDxe: Add no-op InitializeMpSupportJordan Justen4-0/+61
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16345 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-06Remove un-used PPI reference.Jeff Fan1-3/+0
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16303 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-31EDK II Contributions.txt: Update patch format informationJordan Justen1-13/+29
Update to show what the patch looks like in email form. NOTE: This does not modify the wording of the "TianoCore Contribution Agreement 1.0" section Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16297 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-12UefiCpuPkg: error: invalid instruction mnemonic 'retf'Nikolai Saoukh1-1/+1
.S assembler files must be AT&T syntax ones. So Intel syntax mnemonic is not good. Discovered by clang integrated assembler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Nikolai Saoukh <nms@otdel-1.org> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16100 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-12UefiCpuPkg: error: invalid instruction mnemonic 'retf'Nikolai Saoukh1-6/+1
.S assembler files must be AT&T syntax ones. So Intel syntax mnemonic is not good. Discovered by clang integrated assembler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Nikolai Saoukh <nms@otdel-1.org> Reviewed-by: Andrew Fish <afish@apple.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16098 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.1 at 2025-02-13 21:49:40 +0000