summaryrefslogtreecommitdiff
path: root/UefiCpuPkg/Library
AgeCommit message (Collapse)AuthorFilesLines
2015-10-19UefiCpuPkg: Add SmmCpuPlatformHookLibMichael Kinney3-0/+148
Add SmmCpuPlatformHookLib that provides platform specific functions that are used to initialize SMM and process SMIs. A Null instance of this library is provided that should work for most platforms. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18639 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19UefiCpuPkg: Add SmmCpuFeaturesLibMichael Kinney3-0/+601
Add SmmCpuFeaturesLib that provides CPU specific functions that are used to initialize SMM and process SMIs. A functional implementation of this library class is provided that is based on the Intel(R) 64 and IA-32 Architectures Software Developer's Manual [jeff.fan@intel.com: Fix code style issues reported by ECC] Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18638 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19UefiCpuPkg: Add PlatformSecLibMichael Kinney3-0/+127
Add PlatformSecLib class and PlatformSecLibNull instance that is used by the SecCore. PlatformSecLibNull should not be used in a platform build. Instead, it should be used as a template for implementing a platform specific instance of the PlatformSecLib library class. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18635 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19UefiCpuPkg: Add Cpuid.h include files for CPUID related definesMichael Kinney2-0/+2
Move CPUID related defines from LocalApic.h to Cpuid.h Update LocalApicLib instances to include Cpuid.h Update CpuMpPei module to include Cpuid.h Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18633 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-09UefiCpuPkg BaseXApic(X2)Lib: Add ASSERT if local APIC not software enabledHao Wu2-1/+19
Add an ASSERT in GetApicTimerState() to check if the local APIC is software enabled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18595 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-09UefiCpuPkg: Add ASSERT to handle local APIC not config properlyHao Wu1-1/+5
When the local APIC is not configurated properly, function GetApicTimerInitCount() in LocalApicLib may return zero, which will lead to a divide by zero exception in SecPeiDxeTimerLibUefiCpu. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18594 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-05UefiCpuPkg/MtrrLib: MtrrValidBitsMask and MtrrValidAddressMask wrongJeff Fan1-3/+3
Per IA32 SDM, if CPUID.80000008H is not available, software may assume that the processor supports a 36-bit physical address size. However, for such old processors (For example, Quark processor), MtrrValidBitsMask and MtrrValidAddressMask values are reverted and wrong in MtrrLib. MtrrValidBitsMask should be 0xFFFFFFFFFULL and MtrrValidAddressMask should be 0xFFFFFF000ULL. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18396 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-08UefiCpuPkg/Library/CpuExceptionHandlerLib: Add exception type decoderJeff Fan4-15/+77
Add exception type decoder to print exception name string beside print exception type value. The exception names are from IA32 SDM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17877 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27UefiCpuPkg/CpuExceptionHandlerLib: Support IA32 processors without DE or ↵Michael Kinney5-12/+59
FXSAVE/FXRESTOR Use CPUID Leaf 01 to detect support for debug extensions and FXSAVE/FXRESTOR instructions. Do not enable those features in CR4 if they are not supported. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17221 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseXApicX2ApicLib: Support IA32 processors without ↵Michael Kinney2-9/+67
MSR_IA32_APIC_BASE_ADDRESS Use Family from CPUID 01 to detect support for the Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS). If this MSR is not supported, then use Local APIC Base Address from the PCD PcdCpuLocalApicBaseAddress. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17217 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseXApicLib: Support IA32 processors without MSR_IA32_APIC_BASE_ADDRESSMichael Kinney2-11/+61
Use Family from CPUID 01 to detect support for the Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS). If this MSR is not supported, then use Local APIC Base Address from the PCD PcdCpuLocalApicBaseAddress. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17216 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-16Refine the format of PCD in INF files for UefiCpuPkg.Shumin Qiu3-6/+6
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16617 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-17UefiCpuPkg CpuExceptionHandlerLib: Use %rax instead of %eax to make code ↵Jeff Fan1-6/+6
consistence. Make code consistence between ASM and S files. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16530 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-06Remove un-used PPI reference.Jeff Fan1-3/+0
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16303 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-12UefiCpuPkg: error: invalid instruction mnemonic 'retf'Nikolai Saoukh1-1/+1
.S assembler files must be AT&T syntax ones. So Intel syntax mnemonic is not good. Discovered by clang integrated assembler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Nikolai Saoukh <nms@otdel-1.org> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16100 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-12UefiCpuPkg: error: invalid instruction mnemonic 'retf'Nikolai Saoukh1-6/+1
.S assembler files must be AT&T syntax ones. So Intel syntax mnemonic is not good. Discovered by clang integrated assembler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Nikolai Saoukh <nms@otdel-1.org> Reviewed-by: Andrew Fish <afish@apple.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16098 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09UefiCpuPkg: CpuExceptionHandlerLib: Make self modifying code work with XcodeAnderw Fish7-264/+109
CpuExceptionHandlerLib has code that contains absolute relocations, not supported by Xcode for X64, and it then copies this code to an alternate location in memory. It is very hard to write IP relative self-modifiying code. I had to update AsmVectorNumFixup() to also patch in the absolute addressess after the code was copied. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Anderw Fish <afish@apple.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16068 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-03UefiCpuPkg: Convert non DOS format files to DOS formatGao, Liming8-0/+0
Module UNI and Package UNI files are not DOS format. Convert them to DOS format. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16047 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-28UefiCpuPkg: INF/DEC file updates to EDK II packagesGao, Liming8-0/+0
2. Add MODULE_UNI_FILE file that contains the localized Abstract and Description of a module. a. Addresses an information gap between INF files and the UEFI Distribution Packaging Specification XML schema b. There will be an associated update to UPT in BaseTools to consume MODULE_UNI_FILE and associated UNI file during UDP creation that performs the INF -> XML conversion. c. There will be an associated update to UPT in BaseTools to produce MODULE_UNI_FILE and associated UNI file during UDP installation that performs the XML -> INF conversion. 3. Add Module Extra UNI file that provides the localized Name of a module. a. [UserExtensions.TianoCore."ExtraFiles"] provides an easy method for a module to specify extra files not listed in [Sources] or [Binaries] sections to be added to a UDP without having to list the files in the UPT package information data file. b. There will be an associated update to UPT in BaseTools to package up files listed in [UserExtensions.TianoCore."ExtraFiles"] during UDP creation. c. UNI file contains localized name of a module to go along with the localized Abstract and Description from the MODULE_UNI_FILE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15934 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-28UefiCpuPkg: INF/DEC file updates to EDK II packagesGao, Liming8-31/+30
1. Usage information in INF file comment blocks are either incomplete or incorrect. This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes. The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15933 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-111. Save/restore ICR high 32bit value and check Delivery Status before ↵Jeff Fan2-1/+72
sending IPI. It could be fix the interrupted issue between ICR high/low writes by SMI handler. 2. Save/restore CPU Interrupt state around sending IPI. It could avoid sending IPI be interrupted by CPU interrupt handler. 3. Add note for SetApicMode() API that must not be called from an interrupt handler or SMI handler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com> Reviewed-by: Mudusuru, Giri <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15652 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-10Introduce one PCD PcdCpuInitIpiDelayInMicroSeconds to specify the delay ↵Jeff Fan4-8/+13
value after sending out INIT IPI instead of hard code 10 MicroSeconds. Its default value is 10 millisecond per IA32 manual. Platform could customize this PCD value for performance requirement. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15650 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-09Fixed typos: hanlder should be handler.Chen Fan3-3/+3
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15642 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-30Fix the potential address overflow issue when checking PE signature. Jeff Fan1-8/+13
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15602 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-22Fix CRLF formatTian, Hot2-59/+59
Signed-off-by: Tian, Hot <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15162 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-10Fix bug when reserve stack space to fill exception context.Jeff Fan2-8/+8
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15086 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-07MtrrDebugPrintAllMtrrs() should loop until the max physical address is reached. Jeff Fan2-10/+11
GetMemoryCacheTypeFromMtrrType () should return the default memory type instead of UC type for MTRR_CACHE_INVALID_TYPE. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15053 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-201. Only dump CPU Context and CpuDeadLoop () for CPU exception.Jeff Fan1-2/+2
2. mEnabledInterruptNum is total enabled interrupt number, InterruptType should less than mEnabledInterruptNum. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15012 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-13Fix meta file issue.Jeff Fan1-1/+1
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Hesheng Chen <hesheng.chen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14978 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-11Correct INF file to make module pass ICC compiler.Liming Gao3-6/+6
Signed-off-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14961 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-06Fix comments format issue.Jeff Fan7-8/+8
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14934 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-30Add missing ASM_PFX for HookAfterStubHeaderEnd.Jeff Fan1-1/+1
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14922 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-29Fixed typo: HookAfterStubEnd should be HookAfterStubHeaderEnd. It will make ↵Jeff Fan1-1/+1
UINIXGCC IA32 build issue: Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14921 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-29UefiCpuPkg: Using the "movabsq" instruction to read global variable ↵Laszlo Ersek1-4/+10
mDoFarReturnFlag and mErrorCodeFlag to avoid page fault with big RAM sizes (> 2GB). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14920 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-26Cleanup unused ReportStatusCodeLib reference.Jeff Fan4-4/+0
Signed-off-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14898 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-221. Separated DxeSmmCpuExceptionHandlerLib.inf into 2 instance ↵Jeff Fan17-514/+1864
DxeCpuExceptionHandlerLib.inf and SmmCpuExceptionHandlerLib.inf. 2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions. 3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-161. Read 32bit CPU Init APIC ID from CPUID leaf B in XAPIC mode.Jeff Fan2-8/+48
2. Read CPU APIC ID from CPUID leaf B in case CPU Init APIC ID is larger 255 in XAPIC mode. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14674 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-27Removed the assumption on APIC timer initial Count is all 1s and updated it ↵Jeff Fan1-15/+38
to handle the long delay that timer initial count. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14604 6f19259b-4bc3-4df7-8a09-765794883524
2013-02-05Fix build issue on DDK3790 tool chain.vanjeff1-2/+2
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14122 6f19259b-4bc3-4df7-8a09-765794883524
2012-10-10Add missing parameter in functions header.vanjeff1-3/+3
signed-off-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13815 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-27Save and disable CPU interrupt before programming MTRR settings, and restore ↵vanjeff1-39/+50
the CPU interrupt after programming MTRR setting. signed-off-by: Kinney, Michael D <michael.d.kinney@intel.com> reviewed-by: Bjorge, Erik C <erik.c.bjorge@intel.com> reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13749 6f19259b-4bc3-4df7-8a09-765794883524
2012-08-231. Added SetLocalApicBaseAdress() and GetLocalApicBaseAddress() APIs in ↵vanjeff4-19/+105
Local APIC library. 2. Updated Local APIC library instances to get Local APIC base Address by invoking GetLocalApicBaseAddress() instead of by PCD PcdCpuLocalApicBaseAddress. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Kinney Michael D <michael.d.kinney@intel.com> Reviewed-by: Rui Sun <rui.sun@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13668 6f19259b-4bc3-4df7-8a09-765794883524
2012-07-05UefiCpuPkg BaseUefiCpuLib: Change the initialization value for x87 FPU ↵rsun32-7/+7
Control Word for x64 arch from 0x27f to 0x37f per UEFI 2.3.1c spec. Signed-off-by: Sun Rui <rui.sun@intel.com> Reviewed-by: Fan Jeff <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13506 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-31Remove CPU dead loop code from IA32 assembly codes.vanjeff2-14/+0
Signed-off-by: Fan Jeff <jeff.fan@intel.com> Reviewed-by: Sun Rui <rui.sun@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13388 6f19259b-4bc3-4df7-8a09-765794883524
2012-04-11UefiCpuPkg MtrrLib: For MtrrSetAllMtrrs(), do not set FE/E bits in ↵rsun31-11/+27
IA32_MTRR_DEF_TYPE MSR after the MSR is restored. Signed-off-by: Sun Rui <rui.sun@intel.com> Reviewed-by: Fan Jeff <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13182 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-19Fix doxgen format issue.vanjeff4-8/+14
Signed-off-by: vanjeff git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13112 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-15Import two CPU Exception Handler Library instances: ↵vanjeff12-0/+2595
SecPeiCpuExceptionHandler.inf and DxeSmmCpuExceptionHandler.inf. Signed-off-by: vanjeff Reviewed-by: jyao1 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13098 6f19259b-4bc3-4df7-8a09-765794883524
2011-11-25UefiCpuPkg MTRR Library: Remove a buggy check logic in ↵rsun31-10/+0
MtrrSetMemoryAttribute() that may incorrectly RETURN_OUT_OF_RESOURCES in some cases. Signed-off-by: rsun3 Reviewed-by: vanjeff git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12780 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-281. Introduce the API MtrrGetDefaultMemoryType () in Mtrr Library.vanjeff1-7/+11
2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module. 3. Add go though for UC attributes. Signed-off-by: vanjeff Reviewed-by: rsun3 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-27Update Base type SecPeiDxeTimerLibUefiCpu to support all module type.lgao41-3/+6
Signed-off-by: lgao4 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12576 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.1 at 2024-11-05 15:39:24 +0000