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2023-12-07OvmfPkg: exclude NullMemoryTestDxe driverLaszlo Ersek1-2/+0
NullMemoryTestDxe was included in the OVMF platforms in historical commit 999a815e9ff3 ("OvmfPkg: Add NullMemoryTestDxe driver", 2011-01-21). It produces gEfiGenericMemTestProtocolGuid. With LegacyBiosDxe gone, the only consumer of this protocol in all of edk2 is "EmulatorPkg/Library/PlatformBmLib/PlatformBmMemoryTest.c". Thus, exclude NullMemoryTestDxe from all OVMF platforms. (Notably, ArmVirtPkg platforms don't include NullMemoryTestDxe either.) Cc: Anatol Belski <anbelski@linux.microsoft.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Corvin Köhne <corvink@freebsd.org> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jianyong Wu <jianyong.wu@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Roth <michael.roth@amd.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Rebecca Cran <rebecca@bsdio.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4588 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20231110235820.644381-17-lersek@redhat.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-11-27OvmfPkg: Add ImagePropertiesRecordLib InstanceTaylor Beebe1-0/+1
Add an instance of ImagePropertiesRecordLib which will be used by the DXE Core. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Taylor Beebe <taylor.d.beebe@gmail.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-09-14OvmfPkg/RiscVVirt/README: document direct kernel bootLaszlo Ersek1-1/+32
Direct (fw_cfg) kernel boot works on the RiscVVirt firmware platform too; I've tested it after extracting the kernel, initrd, and kernel command line from "openSUSE-Tumbleweed-RISC-V-E20-efi.riscv64.raw". Document this type of boot, because at least historically, fw_cfg kernel boot was implemented differently between OVMF and ArmVirtQemu. Thanks: Drew, Sunil. Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Andrew Jones <ajones@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-14OvmfPkg/RiscVVirt/README: explain the "acpi=off" machine propertyLaszlo Ersek1-0/+5
"acpi=off" is arguably unusual with UEFI guest OSes; add a note to explain it. Original explanation by Drew Jones. Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Andrew Jones <ajones@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-14OvmfPkg/RiscVVirt/README: explain that "-bios" is only useful with TCGLaszlo Ersek1-0/+5
Riscv64 KVM services SBI calls internally, so OpenSBI is not used in such setups. Restrict the "-bios" flag accordingly. Thanks: Andrei, Drew. Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Andrew Jones <ajones@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> [lersek@redhat.com: '-bios' is rejected with KVM accel (Drew)] Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-12OvmfPkg/RiscVVirt/README.md: bring your own OpenSBILaszlo Ersek1-0/+17
Explain how users can compose their pre-OS environment purely from binaries they've built themselves. Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-08MdeModulePkg: Duplicate BaseRngLibTimerLib to MdeModulePkgPierre Gondois1-1/+1
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4504 The BaseRngLibTimerLib allows to generate number based on a timer. This mechanism allows to have a basic non-secure implementation for non-production platforms. To bind and identify Random Number Generators implementations with a GUID, an unsafe GUID should be added. This GUID cannot be added to the MdePkg unless it is also added to a specification. To keep the MdePkg self-contained, copy the BaseRngLibTimerLib to the MdeModulePkg. This will allow to define an unsafe Rng GUID in a later patch in the MdeModulePkg. The MdePkg implementation will be removed later. This allows to give some time to platform owners to switch to the MdeModulePkg implementation. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-08-25OvmfPkg/RiscVVirt: Fix issues in VarStore Blockmap configedk2-stable202308Qingyu Shang1-3/+3
The block size configuration of Blockmap does not match that in Qemu VirtNorFlash, which causes variable data to be written into FtwWorkBlock by mistake, resulting in data loss during reboot. Fix it and update new checksum value. Signed-off-by: Qingyu Shang <2931013282@sjtu.edu.cn> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-31OvmfPkg/RiscVVirt: Update README for CLANGDWARF supportSunil V L1-3/+25
Update the README with instruction to build using CLANGDWARF toolchain. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
2023-07-31OvmfPkg/RiscVVirt: SecEntry: Remove unnecessary assembly directivesSunil V L1-3/+0
llvm fails to resolve _ModuleEntry when these extra directives are present. ASM_FUNC already takes care what is required. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
2023-07-31OvmfPkg/RiscVVirt: use 'auto' alignment and FIXED for XIP modulesSunil V L1-24/+10
Use auto alignment and FIXED FFS attribute for XIP modules similar to [1]. Without this change, the CLANGDWARF toolchain will fail to build with below error. GenFfs: ERROR 1000: Unknown option SectionAlign option must be specified with section file. [1] - https://github.com/tianocore/edk2/commit/7669f7349829f0e4755552ba0d6e600492fd8170 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
2023-07-21OvmfPkg/RiscVVirt: Avoid printing hard coded timeout valueSunil V L1-1/+1
Print the timeout value set in the PCD variable instead of hard coded 10 seconds. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
2023-07-21OvmfPkg/RiscVVirt: Check "no-map" and mark EfiReservedMemoryTypeSunil V L1-20/+17
OpenSBI now marks PMP regions with "no-map" attribute. So, remove the workaround and add the ReservedMemory only when no-map is set so that it follows DT spec. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Ranbir Singh <rsingh@ventanamicro.com>
2023-07-15UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 modeTuan Phan1-0/+1
During CpuDxe initialization, MMU will be setup with the highest mode that HW supports. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15OvmfPkg: RiscVVirt: Remove satp bare mode settingTuan Phan1-16/+2
There is no point to set satp to bare mode as that should be the default mode when booting edk2. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15OvmfPkg/RiscVVirt: Add VirtNorFlashDxe to APRIORI listTuan Phan1-0/+10
Make sure VirtNorFlashDxe loaded before VariableRuntimeDxe as it is the backend flash driver. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15OvmfPkg/RiscVVirt: SEC: Add IO memory resource hob for platform devicesTuan Phan1-0/+62
Normally, DXE driver would add device resource to GCD before start using. But some key resources such as uart used for printing info at very early stage. Those resources should be populated to HOB in SEC phase so they are added to GCD before MMU enabled. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15OvmfPkg/RiscVVirt: VirtNorFlashPlatformLib: Fix wrong flash sizeTuan Phan1-1/+2
The size should be for single region, not the whole firmware FD. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-06-23OvmfPkg: move PciEncoding into AcpiPlatformLibCorvin Köhne1-0/+1
Bhyve supports providing ACPI tables by FwCfg. Therefore, InstallQemuFwCfgTables should be moved to AcpiPlatformLib to reuse the code. As first step, move PciEncoding into AcpiPlatformLib. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
2023-06-23OvmfPkg/RiscVVirt: Add a readme for build and testSunil V L1-0/+49
Add a readme file which provides information regarding how to build and test EDK2 on RISC-V qemu virt platform. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-23OvmfPkg/RiscVVirt: Add support for separate code and variable storeSunil V L3-13/+19
Currently, RiscVVirtQemu supports unified code and variable store mainly because only one pflash devices was available in qemu for EDK2. However, this doesn't allow to map the code part as read-only. With recent qemu enhancements, it is now possible for EDK2 to make use of both pflash devices in RISC-V virt machine. So, add support to create code and vars images separately. This also allows easy firmware code updates without losing the variable store. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-23OvmfPkg/RiscVVirt: Add VirtNorFlashDeviceTreeLib librarySunil V L2-0/+177
This library is required to support separate code and variable store images. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-23OvmfPkg/RiscVVirt: Fix couple of issues in VarStoreSunil V L1-6/+6
The size of the FV and the WriteQueueSize is incorrect which causes the flash to be re-written during boot. Fix them and update the new checksum value. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02OvmfPkg/RiscVVirt: Remove unimplemented NxForStack configurationArd Biesheuvel1-6/+0
The RISC-V version of the DXE IPL does not implement setting the stack NX, so before switching to an implementation that will ASSERT() on the missing support, drop the PCD setting that enables it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-05-17OvmfPkg: RiscVVirt: Add missing SerialPortInitialize to SecAndrei Warkentin3-1/+5
If the SerialPortLib had any initialization needed, this would be skipped in the RiscVVirt Sec. Follow the example seen elsewhere (ArmVirtPkg PrePi). Seen with BaseSerialPortLibRiscVSbiLibRam not using DBCN in Sec, yet using DBCN elsewhere. Cc: Daniel Schaefer <git@danielschaefer.me> Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-04-10OvmfPkg: Update code to be more C11 compliant by using __func__Rebecca Cran6-25/+25
__FUNCTION__ is a pre-standard extension that gcc and Visual C++ among others support, while __func__ was standardized in C99. Since it's more standard, replace __FUNCTION__ with __func__ throughout OvmfPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-03-28OvmfPkg/RiscVVirt: Support multiple reserved memory rangesSunil V L1-77/+149
M-mode firmware ranges should not be used by EDK2/OS. Currently, we search for mmode_resv0 node in FDT and mark it as the reserved memory in EFI memory map. However, if there are multiple M-mode firmware ranges, then this will miss those extra ranges allowing the OS to access the memory and hit a fault. This issue is exposed since recent opensbi started creating two ranges for text and data. Fix this by searching for all reserved memory nodes and marking them as reserved in the EFI memory map. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
2023-03-08OvmfPkg: RiscVVirt: add SATA supportAndrei Warkentin2-0/+14
Tested with a PCIe pass-thru'd AHCI controller. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
2023-03-01OvmfPkg/RiscVVirt: Add Stack HOBedk2-stable202302Sunil V L1-3/+6
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4350 Currently, stack HOB is not created for the stack memory. This causes stack memory to be treated as free memory and any memory allocation which happens at this address causes random memory corruption. Fix this by creating the stack HOB which marks the memory as BS data. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reported-by: Andrei Warkentin <andrei.warkentin@intel.com> Tested-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
2023-02-23OvmfPkg/RiscVVirt: Fix SCT memory allocation test case failureSunil V L1-2/+3
Fix the UEFI memory range calculation by including the correct stack memory range. Without this fix, SCT hangs in MemoryAllocation test cases which call AllocateAddress(). Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Reported-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
2023-02-16OvmfPkg/RiscVVirt: Add build files for Qemu Virt platformSunil V L5-0/+1266
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 Add infrastructure files to build edk2 for RISC-V qemu virt machine. - It follows PEI less design. - EDK2 for qemu virt is booted in S-mode as a payload for M-mode FW - Leveraged from ArmVirtQemu Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-02-16OvmfPkg/RiscVVirt: Add SEC moduleSunil V L7-0/+673
Add the SEC module for RISC-V Qemu virt machine support. It uses the PEI less design. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-02-16OvmfPkg/RiscVVirt: Add PciCpuIo2Dxe moduleSunil V L2-0/+605
Add PciCpuIo2Dxe driver to implement EFI_CPU_IO2_PROTOCOL to add the translation for IO access. This is copied from ArmPciCpuIo2Dxe driver. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-02-16OvmfPkg/RiscVVirt: Add VirtNorFlashPlatformLib librarySunil V L2-0/+70
Qemu NOR flash driver needs this library. Add this library for RISC-V leveraged from SbsaQemu. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-02-16OvmfPkg/RiscVVirt: Add ResetSystemLib librarySunil V L2-0/+166
RISC-V Qemu virt uses SBI calls to implement the reset. Add the base class library. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-02-16OvmfPkg/RiscVVirt: Add PrePiHobListPointerLib librarySunil V L2-0/+88
Add the PrePiHobListPointerLib required for RISC-V Qemu Virt machine since it follows PEIless design. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-02-16OvmfPkg/RiscVVirt: Add PlatformBootManagerLib librarySunil V L4-0/+1275
RISC-V Qemu Virt platfform needs the PlatformBootManagerLib similar to the one in ArmVirtPlatform. Add the library in OvmfPkg/RiscVVirt leveraging the one from Arm. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
generated by cgit v1.1 at 2024-11-13 23:16:49 +0000