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2021-06-04OvmfPkg/PciHostBridgeLibScan: clean up file names and file-top commentsLaszlo Ersek4-5/+6
Rename "XenSupport.c" to "ScanForRootBridges.c", after the main function in it. Update the file-top comments; refer to both Bhyve and Xen. Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien@xen.org> Cc: Peter Grehan <grehan@freebsd.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Rebecca Cran <rebecca@bsdio.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210526201446.12554-36-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-06-04OvmfPkg/PciHostBridgeLibScan: remove PcdOvmfHostBridgePciDevIdLaszlo Ersek2-7/+1
The "OvmfPkg/Library/PciHostBridgeLibScan/PciHostBridgeLibScan.inf" instance is used in the following platforms in edk2: OvmfPkg/Bhyve/BhyveX64.dsc OvmfPkg/OvmfXen.dsc Neither Bhyve nor Xen provide a Q35 board, therefore the expression PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID always evaluates to TRUE, in the PciHostBridgeLibScan instance. Replace the expression with constant TRUE, eliminating the PCD dependency. (In effect, this reports that the root bridge being registered does not support extended PCI config space.) Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien@xen.org> Cc: Peter Grehan <grehan@freebsd.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Rebecca Cran <rebecca@bsdio.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210526201446.12554-35-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-06-04OvmfPkg/PciHostBridgeLibScan: remove QEMU (fw_cfg) supportLaszlo Ersek2-68/+2
The "OvmfPkg/Library/PciHostBridgeLibScan/PciHostBridgeLibScan.inf" instance is used in the following platforms in edk2: OvmfPkg/Bhyve/BhyveX64.dsc OvmfPkg/OvmfXen.dsc Both platforms define "PcdPciDisableBusEnumeration" with Fixed-at-Build access method, and TRUE value. Remove the PCD from the PciHostBridgeLibScan instance, and everything else that is useful only when the PCD is FALSE. In practice, this removes the PciHostBridgeUtilityGetRootBridges() function call, which is based on fw-cfg; see "OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c". (Note that the dependency on PciHostBridgeUtilityLib remains in place, given that the PciHostBridgeLibScan instance continues using lower-level functions from the library that do not depend on fw-cfg.) Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien@xen.org> Cc: Peter Grehan <grehan@freebsd.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Rebecca Cran <rebecca@bsdio.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210526201446.12554-34-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-06-04OvmfPkg/PciHostBridgeLib: remove Bhyve and Xen supportLaszlo Ersek4-497/+0
The "OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf" instance is used by the following platforms in edk2: OvmfPkg/AmdSev/AmdSevX64.dsc OvmfPkg/OvmfPkgIa32.dsc OvmfPkg/OvmfPkgIa32X64.dsc OvmfPkg/OvmfPkgX64.dsc All these platforms statically inherit PcdPciDisableBusEnumeration=FALSE from "MdeModulePkg.dec". Remove the the PCD and everything that depends on it from the PciHostBridgeLib instance. Namely, remove the logic that determines the root bridge apertures by (a) scanning the entire bus, device and function number space, and (b) parsing the BAR values that were pre-set by the Bhyve or Xen machinery. "XenSupport.c" used to be listed explicitly in "Maintainers.txt", remove it from that spot too. Cc: Andrew Fish <afish@apple.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210526201446.12554-33-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-06-04OvmfPkg/PciHostBridgeLibScan: create from PciHostBridgeLibLaszlo Ersek4-0/+673
Create an almost verbatim copy of the "OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf" library instance. The new PciHostBridgeLibScan instance will ultimately duplicate a negligible amount of code from the original, and will be used by the Bhyve and OvmfXen platforms. List the new driver in "Maintainers.txt", in the "OvmfPkg: bhyve-related modules" and "OvmfPkg: Xen-related modules" sections. This patch should be reviewed with "git show --find-copies-harder". Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien@xen.org> Cc: Peter Grehan <grehan@freebsd.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Rebecca Cran <rebecca@bsdio.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210526201446.12554-30-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-06-04OvmfPkg/PciHostBridgeLib: consolidate #includes and INF file sectionsLaszlo Ersek3-30/+23
- In every C file, list every necessary public #include individually, with an example identifier that's actually consumed. - Place all public #includes first, all module-private #includes second. Separate them with a single empty line. Keep each section sorted in itself. - Sort all sections in the INF file, except [Defines]. - Add unlisted lib classes. - Remove unnecessary #include directives, add unlisted #include directives. Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien@xen.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210526201446.12554-29-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-06-02OvmfPkg/VirtioMmioDeviceLib: Add EFIAPI to VirtioMmioSetQueueAddressGerd Hoffmann2-0/+2
This error was found while compiling VirtioMmioDeviceLib for X64 with the GCC5 toolchain, where EFIAPI makes a difference. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20210602045935.762211-1-kraxel@redhat.com> [lersek@redhat.com: prepend module name to subject, trim subject back to allowed length] Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-05-29OvmfPkg/BaseMemEncryptSevLib: remove Flush parameterBrijesh Singh6-46/+15
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 The Flush parameter is used to provide a hint whether the specified range is Mmio address. Now that we have a dedicated helper to clear the memory encryption mask for the Mmio address range, its safe to remove the Flush parameter from MemEncryptSev{Set,Clear}PageEncMask(). Since the address specified in the MemEncryptSev{Set,Clear}PageEncMask() points to a system RAM, thus a cache flush is required during the encryption mask update. Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Erdem Aktas <erdemaktas@google.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Message-Id: <20210519181949.6574-14-brijesh.singh@amd.com>
2021-05-29OvmfPkg/BaseMemEncryptSevLib: introduce MemEncryptSevClearMmioPageEncMask()Brijesh Singh5-0/+150
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 The MemEncryptSevClearMmioPageEncMask() helper can be used for clearing the memory encryption mask for the Mmio region. The MemEncryptSevClearMmioPageEncMask() is a simplified version of MemEncryptSevClearPageEncMask() -- it does not flush the caches after clearing the page encryption mask. Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Erdem Aktas <erdemaktas@google.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Message-Id: <20210519181949.6574-10-brijesh.singh@amd.com>
2021-04-30OvmfPkg/VmgExitLib: Add support for new MMIO MOV opcodesLendacky, Thomas1-0/+111
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345 Enabling TPM support results in guest termination of an SEV-ES guest because it uses MMIO opcodes that are not currently supported. Add support for the new MMIO opcodes (0xA0 - 0xA3), MOV instructions which use a memory offset directly encoded in the instruction. Also, add a DEBUG statement to identify an unsupported MMIO opcode being used. Fixes: c45f678a1ea2080344e125dc55b14e4b9f98483d Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <2fdde57707b52ae39c49341c9d97053aaff56e4a.1619716333.git.thomas.lendacky@amd.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
2021-04-30OvfmPkg/VmgExitLib: Properly decode MMIO MOVZX and MOVSX opcodesLendacky, Thomas1-2/+7
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345 The MOVZX and MOVSX instructions use the ModRM byte in the instruction, but the instruction decoding support was not decoding it. This resulted in invalid decoding and failing of the MMIO operation. Also, when performing the zero-extend or sign-extend operation, the memory operation should be using the size, and not the size enumeration value. Add the ModRM byte decoding for the MOVZX and MOVSX opcodes and use the true data size to perform the extend operations. Additionally, add a DEBUG statement identifying the MMIO address being flagged as encrypted during the MMIO address validation. Fixes: c45f678a1ea2080344e125dc55b14e4b9f98483d Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <5949d54cb2c9ab69256f67ed5654b32654c0501c.1619716333.git.thomas.lendacky@amd.com>
2021-04-13OvmfPkg/IndustryStandard: Introduce PageTable.hAnthony PERARD1-142/+1
We are going to use the page table structure in yet another place, collect the types and macro that can be used from another module rather than making yet another copy. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2490 Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <20210412133003.146438-5-anthony.perard@citrix.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-03-19OvmfPkg/X86QemuLoadImageLib: Handle allocation failure for CommandLineMartin Radev1-0/+10
The CommandLine and InitrdData may be set to NULL if the provided size is too large. Because the zero page is mapped, this would not cause an immediate crash but can lead to memory corruption instead. This patch just adds validation and returns error if either allocation has failed. Signed-off-by: Martin Radev <martin.b.radev@gmail.com> Message-Id: <YFPJsaGzVWQxoEU4@martin-ThinkPad-T440p> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> [lersek@redhat.com: drop unnecessary empty line from code; remove personal (hence likely unstable) repo reference from commit message] Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-03-16OvmfPkg/SmmCpuFeaturesLib: call CPU hot-eject handlerAnkur Arora1-0/+34
Call the CPU hot-eject handler if one is installed. The condition for installation is (PcdCpuMaxLogicalProcessorNumber > 1), and there's a hot-unplug request. The handler is called from SmmCpuFeaturesRendezvousExit(), which is in-turn called at the tail-end of SmiRendezvous() after the BSP has signalled an SMI exit via the "AllCpusInSync" loop. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Aaron Young <aaron.young@oracle.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3132 Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com> Message-Id: <20210312062656.2477515-8-ankur.a.arora@oracle.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-03-16OvmfPkg/SmmCpuFeaturesLib: init CPU ejection stateAnkur Arora2-0/+81
Init CPU_HOT_EJECT_DATA, which will be used to share CPU ejection state between SmmCpuFeaturesLib (via PiSmmCpuDxeSmm) and CpuHotPlugSmm. The init happens via SmmCpuFeaturesSmmRelocationComplete(), and so it will run as part of the PiSmmCpuDxeSmm entry point function, PiCpuSmmEntry(). Once inited, CPU_HOT_EJECT_DATA is exposed via PcdCpuHotEjectDataAddress. The CPU hot-eject handler (CPU_HOT_EJECT_DATA->Handler) is setup when there is an ejection request via CpuHotplugSmm. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Aaron Young <aaron.young@oracle.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3132 Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com> Message-Id: <20210312062656.2477515-7-ankur.a.arora@oracle.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20OvmfPkg/PciHostBridgeUtilityLib: Extend GetRootBridges() with BusMin/BusMaxJiahui Cen via groups.io2-5/+26
Extend parameter list of PciHostBridgeUtilityGetRootBridges() with BusMin/ BusMax, so that the utility function could be compatible with ArmVirtPkg who uses mutable bus range [BusMin, BusMax] insteand of [0, PCI_MAX_BUS]. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210119011302.10908-10-cenjiahui@huawei.com> [lersek@redhat.com: fix logging of UINTN values BusMin, BusMax] [lersek@redhat.com: keep zeroing of (*Count) centralized] [lersek@redhat.com: fix typos in ExtraRootBridges comment] Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20OvmfPkg/PciHostBridgeUtilityLib: Extend parameter list of GetRootBridgesJiahui Cen via groups.io3-19/+24
Extend parameter list of PciHostBridgeUtilityGetRootBridges() with DmaAbove4G, NoExtendedConfigSpace to support for ArmVirtPkg. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Signed-off-by: Yubo Miao <miaoyubo@huawei.com> Message-Id: <20210119011302.10908-9-cenjiahui@huawei.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20OvmfPkg/PciHostBridgeLib: Extract GetRootBridges() / FreeRootBridges()Jiahui Cen via groups.io4-135/+206
Extract PciHostBridgeGetRootBridges() / PciHostBridgeFreeRootBridges() to PciHostBridgeUtilityLib as common utility functions to share support for scanning extra root bridges. No change of functionality. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Signed-off-by: Yubo Miao <miaoyubo@huawei.com> Message-Id: <20210119011302.10908-8-cenjiahui@huawei.com> [lersek@redhat.com: keep zeroing of (*Count) centralized] Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20OvmfPkg/PciHostBridgeUtilityLib: Extend parameters of InitRootBridge()Jiahui Cen via groups.io5-33/+41
Extend parameter list of PciHostBridgeUtilityInitRootBridge() with DmaAbove4G and NoExtendedConfigSpace to prepare for sharing with ArmVirtPkg. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Julien Grall <julien@xen.org> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Signed-off-by: Yubo Miao <miaoyubo@huawei.com> Message-Id: <20210119011302.10908-6-cenjiahui@huawei.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20OvmfPkg/PciHostBridgeLib: Extract InitRootBridge() / UninitRootBridge()Jiahui Cen via groups.io6-213/+172
Extract InitRootBridge() / UninitRootBridge() to PciHostBridgeUtilityLib as common utility functions. No change of functionality. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Julien Grall <julien@xen.org> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Signed-off-by: Yubo Miao <miaoyubo@huawei.com> Message-Id: <20210119011302.10908-5-cenjiahui@huawei.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20OvmfPkg/PciHostBridgeLib: List missing PcdLib dependencyJiahui Cen via groups.io3-0/+3
OvmfPkg/PciHostBridgeLib instance fails to list its PcdLib dependency, both between the #include directives, and in the INF file. So let's list the dependency. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Julien Grall <julien@xen.org> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210119011302.10908-4-cenjiahui@huawei.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20OvmfPkg: Introduce PciHostBridgeUtilityLib classJiahui Cen via groups.io4-39/+118
Introduce a new PciHostBridgeUtilityLib class to share duplicate code between OvmfPkg and ArmVirtPkg. Extract function PciHostBridgeUtilityResourceConflict from PciHostBridgeResourceConflict in OvmfPkg/PciHostBridgeLib. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Rebecca Cran <rebecca@bsdio.com> Cc: Peter Grehan <grehan@freebsd.org> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Julien Grall <julien@xen.org> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Signed-off-by: Yubo Miao <miaoyubo@huawei.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210119011302.10908-2-cenjiahui@huawei.com>
2021-01-07OvfmPkg/VmgExitLib: Validate #VC MMIO is to un-encrypted memoryTom Lendacky4-1/+86
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108 When SEV-ES is active, and MMIO operation will trigger a #VC and the VmgExitLib exception handler will process this MMIO operation. A malicious hypervisor could try to extract information from encrypted memory by setting a reserved bit in the guests nested page tables for a non-MMIO area. This can result in the encrypted data being copied into the GHCB shared buffer area and accessed by the hypervisor. Prevent this by ensuring that the MMIO source/destination is un-encrypted memory. For the APIC register space, access is allowed in general. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <0cf28470ad5e694af45f7f0b35296628f819567d.1610045305.git.thomas.lendacky@amd.com>
2021-01-07OvmfPkg/VmgExitLib: Support nested #VCsTom Lendacky6-21/+339
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108 In order to be able to issue messages or make interface calls that cause another #VC (e.g. GetLocalApicBaseAddress () issues RDMSR), add support for nested #VCs. In order to support nested #VCs, GHCB backup pages are required. If a #VC is received while currently processing a #VC, a backup of the current GHCB content is made. This allows the #VC handler to continue processing the new #VC. Upon completion of the new #VC, the GHCB is restored from the backup page. The #VC recursion level is tracked in the per-vCPU variable area. Support is added to handle up to one nested #VC (or two #VCs total). If a second nested #VC is encountered, an ASSERT will be issued and the vCPU will enter CpuDeadLoop (). For SEC, the GHCB backup pages are reserved in the OvmfPkgX64.fdf memory layout, with two new fixed PCDs to provide the address and size of the backup area. For PEI/DXE, the GHCB backup pages are allocated as boot services pages using the memory allocation library. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <ac2e8203fc41a351b43f60d68bdad6b57c4fb106.1610045305.git.thomas.lendacky@amd.com>
2021-01-07OvmfPkg/MemEncryptSevLib: Address range encryption state interfaceTom Lendacky9-12/+335
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108 Update the MemEncryptSevLib library to include an interface that can report the encryption state on a range of memory. The values will represent the range as being unencrypted, encrypted, a mix of unencrypted and encrypted, and error (e.g. ranges that aren't mapped). Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <0d98f4d42a2b67310c29bac7bcdcf1eda6835847.1610045305.git.thomas.lendacky@amd.com>
2021-01-07OvmfPkg/MemEncryptSevLib: Make the MemEncryptSevLib available for SECTom Lendacky7-4/+289
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108 In preparation for a new interface to be added to the MemEncryptSevLib library that will be used in SEC, create an SEC version of the library. This requires the creation of SEC specific files. Some of the current MemEncryptSevLib functions perform memory allocations which cannot be performed in SEC, so these interfaces will return an error during SEC. Also, the current MemEncryptSevLib library uses some static variables to optimize access to variables, which cannot be used in SEC. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <bc7fa76cc23784ab3f37356b6c10dfec61942c38.1610045305.git.thomas.lendacky@amd.com>
2021-01-07OvmfPkg/MemEncryptSevLib: Coding style fixes in prep for SEC libraryTom Lendacky1-6/+6
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108 Creating an SEC version of the library requires renaming an existing file which will result in the existing code failing ECC. Prior to renaming the existing file, fix the coding style to avoid the ECC failure. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <f765d867da4a703e0a0db35e26515a911482fd40.1610045305.git.thomas.lendacky@amd.com>
2021-01-07OvmfPkg/VmgExitLib: Check for an explicit DR7 cached valueTom Lendacky1-4/+7
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108 Check the DR7 cached indicator against a specific value. This makes it harder for a hypervisor to just write random data into that field in an attempt to use an invalid DR7 value. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <65157c1155a9c058c43678400dfc0b486e327a3e.1610045305.git.thomas.lendacky@amd.com>
2021-01-07OvmfPkg: Obtain SEV encryption mask with the new MemEncryptSevLib APITom Lendacky1-10/+5
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108 The early assembler code performs validation for some of the SEV-related information, specifically the encryption bit position. The new MemEncryptSevGetEncryptionMask() interface provides access to this validated value. To ensure that we always use a validated encryption mask for an SEV-ES guest, update all locations that use CPUID to calculate the encryption mask to use the new interface. Also, clean up some call areas where extra masking was being performed and where a function call was being used instead of the local variable that was just set using the function. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Rebecca Cran <rebecca@bsdio.com> Cc: Peter Grehan <grehan@freebsd.org> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Julien Grall <julien@xen.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <9de678c0d66443c6cc33e004a4cac0a0223c2ebc.1610045305.git.thomas.lendacky@amd.com>
2021-01-07OvmfPkg/MemEncryptSevLib: Add an interface to retrieve the encryption maskTom Lendacky5-98/+371
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108 To ensure that we always use a validated encryption mask for an SEV-ES guest, create a new interface in the MemEncryptSevLib library to return the encryption mask. This can be used in place of the multiple locations where CPUID is used to retrieve the value (which would require validation again) and allows the validated mask to be returned. The PEI phase will use the value from the SEV-ES work area. Since the SEV-ES work area isn't valid in the DXE phase, the DXE phase will use the PcdPteMemoryEncryptionAddressOrMask PCD which is set during PEI. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Rebecca Cran <rebecca@bsdio.com> Cc: Peter Grehan <grehan@freebsd.org> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Julien Grall <julien@xen.org> Cc: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <e12044dc01b21e6fc2e9535760ddf3a38a142a71.1610045305.git.thomas.lendacky@amd.com>
2020-12-18OvmfPkg/PlatformBootManagerLib: fix PCI interrupt link (LNKx)Borghorst, Hendrik via groups.io1-13/+16
This patch fixes an issue with the current programming of the i440fx PCI Interrupt routing assignment. Explanation by Laszlo Ersek: (1) The rotating pattern is a map: (slot, function) --> (interrupt link) [LNKA..LNKD] (more precisely, it is a pattern from (slot, pin) to (interrupt link), but function<->pin is an identity mapping in the QEMU hardware, so we can just use (slot, function) rather than (slot, pin) on the left hand side. But I digress.) The ACPI _PRT object is generated by QEMU; it describes this map. (2) Another map is (interrupt link) --> { set of possible interrupt numbers, for this link } This map is given by the LNK[A..D] ACPI objects, also given by QEMU. (3) What the firmware is expected to do is: (3a) for each interrupt link, select an *actual* interrupt from the set that's possible for that link, yielding a deterministic map (interrupt link) --> (actual interrupt number) and (3b) for each PCI device/function with an interrupt pin, resolve the (slot, function) --> (interrupt link) --> (actual interrupt number) functional composition, and program the result into the Interrupt Line register of the device. In OVMF, we do not parse the rotating map described under (1) from QEMU's _PRT object. Instead, we duplicate the code. This is not a problem. In OVMF, we also do not parse the map described under (2) from QEMU's ACPI content. Instead, we pick a specific selection (3a) that we "apriori" know satisfies (2). This is also not a problem. OVMF's particular selection is the PciHostIrqs table. ( Table (2) from QEMU is LNKA -> { 5, 10, 11 } LNKB -> { 5, 10, 11 } LNKC -> { 5, 10, 11 } LNKD -> { 5, 10, 11 } and our specific pick in OVMF, in the PciHostIrqs table, is LNKA -> 10 LNKB -> 10 LNKC -> 11 LNKD -> 11 ) In OVMF, we also cover step (3b), in the SetPciIntLine() function. What's missing in OVMF -- and what this patch corrects -- is that we currently fail to program our selection for table (3) into the hardware. We pick a specific LNKx->IRQ# mapping for each interrupt link, and we correctly program the PCI Interrupt Line registers through those link-to-IRQ mappings -- but we don't tell the hardware about the link-to-IRQ mappings. More precisely, we program such a link-to-IRQ mapping table into the hardware that is then not matched by the mapping we use for programming the PCI device/function interrupt lines. As a result, some PCI Interrupt Line registers will have impossible values -- a given (slot, function) may use a particular link, but also report an interrupt number that was never picked for that link. Output of Linux PCI Interrupt Links for i440fx before the patch: [ 0.327305] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 10 *11) [ 0.327944] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 10 *11) [ 0.328582] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 *10 11) [ 0.329208] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 *10 11) [ 0.329807] ACPI: PCI Interrupt Link [LNKS] (IRQs *9) after the patch: [ 0.327292] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11) [ 0.327934] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11) [ 0.328564] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11) [ 0.329195] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11) [ 0.329785] ACPI: PCI Interrupt Link [LNKS] (IRQs *9) Output of Linux PCI Interrupt Links for q35 before the patch: [ 0.307474] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11) [ 0.308027] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11) [ 0.308764] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11) [ 0.309310] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11) [ 0.309853] ACPI: PCI Interrupt Link [LNKE] (IRQs 5 *10 11) [ 0.310508] ACPI: PCI Interrupt Link [LNKF] (IRQs 5 *10 11) [ 0.311051] ACPI: PCI Interrupt Link [LNKG] (IRQs 5 10 *11) [ 0.311589] ACPI: PCI Interrupt Link [LNKH] (IRQs 5 10 *11) after the patch: [ 0.301991] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11) [ 0.302833] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11) [ 0.303354] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11) [ 0.303873] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11) [ 0.304399] ACPI: PCI Interrupt Link [LNKE] (IRQs 5 *10 11) [ 0.304918] ACPI: PCI Interrupt Link [LNKF] (IRQs 5 *10 11) [ 0.305436] ACPI: PCI Interrupt Link [LNKG] (IRQs 5 10 *11) [ 0.305954] ACPI: PCI Interrupt Link [LNKH] (IRQs 5 10 *11) Signed-off-by: Hendrik Borghorst <hborghor@amazon.de> Reviewed-by: David Woodhouse <dwmw@amazon.co.uk> Message-Id: <8dbedc4c7a1c3fd390aca915270814e3b35e13a5.camel@amazon.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-14OvmfPkg/AmdSev: add Grub Firmware Volume PackageJames Bottomley4-0/+1944
This is used to package up the grub bootloader into a firmware volume where it can be executed as a shell like the UEFI Shell. Grub itself is built as a minimal entity into a Fv and then added as a boot option. By default the UEFI shell isn't built but for debugging purposes it can be enabled and will then be presented as a boot option (This should never be allowed for secure boot in an external data centre but may be useful for local debugging). Finally all other boot options except grub and possibly the shell are stripped and the boot timeout forced to 0 so the system will not enter a setup menu and will only boot to grub. This is done by copying the Library/PlatformBootManagerLib into Library/PlatformBootManagerLibGrub and then customizing it. Boot failure is fatal to try to prevent secret theft. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3077 Signed-off-by: James Bottomley <jejb@linux.ibm.com> Message-Id: <20201130202819.3910-4-jejb@linux.ibm.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com> [lersek@redhat.com: replace local variable initialization with assignment] Reviewed-by: Laszlo Ersek <lersek@redhat.com> [lersek@redhat.com: squash 'OvmfPkg: add "gGrubFileGuid=Grub" to GuidCheck.IgnoreDuplicates', reviewed stand-alone by Phil (msgid <e6eae551-8563-ccfb-5547-7a97da6d46e5@redhat.com>) and Ard (msgid <10aeda37-def6-d9a4-6e02-4c66c1492f57@arm.com>)]
2020-11-30OvmfPkg: Fix style of BhyveFwCtlLib.infRebecca Cran1-3/+2
Fix the order of libraries and update INF_VERSION to 1.29. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Message-Id: <20201130053412.2-4-rebecca@bsdio.com> Acked-by: Peter Grehan <grehan@freebsd.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-30OvmfPkg: Improve code style/formatting in BhyveFwCtlLib.cRebecca Cran1-67/+69
The code style in Library/BhyveFwCtlLib/BhyveFwCtlLib.c was very inconsistent. Fix it to pass the ECC tool checks by typedef'ing structs, and improve indentation. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Message-Id: <20201130053412.2-3-rebecca@bsdio.com> Acked-by: Peter Grehan <grehan@freebsd.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-30OvmfPkg: Fix BhyveFwCtlLib build with VS2019Rebecca Cran1-25/+25
Update BhyveFwCtlLib.c to fix problems with UINT32/UINTN types that prevented Bhyve from building with VS2019. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Message-Id: <20201130053412.2-2-rebecca@bsdio.com> Acked-by: Peter Grehan <grehan@freebsd.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-27OvmfPkg/Bhyve: Add support for the AMD host bridgeRebecca Cran1-2/+4
On bhyve, either an Intel or AMD host bridge can be specified, with the default being Intel. Both are identical, except the AMD one uses a PCI vendor ID of AMD. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Peter Grehan <grehan@freebsd.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20201124005733.18107-3-rebecca@bsdio.com>
2020-11-10UefiCpuPkg, OvmfPkg: Disable interrupts when using the GHCBTom Lendacky2-6/+25
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 The QemuFlashPtrWrite() flash services runtime uses the GHCB and VmgExit() directly to perform the flash write when running as an SEV-ES guest. If an interrupt arrives between VmgInit() and VmgExit(), the Dr7 read in the interrupt handler will generate a #VC, which can overwrite information in the GHCB that QemuFlashPtrWrite() has set. This has been seen with the timer interrupt firing and the CpuExceptionHandlerLib library code, UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ Xcode5ExceptionHandlerAsm.nasm and ExceptionHandlerAsm.nasm reading the Dr7 register while QemuFlashPtrWrite() is using the GHCB. In general, it is necessary to protect the GHCB whenever it is used, not just in QemuFlashPtrWrite(). Disable interrupts around the usage of the GHCB by modifying the VmgInit() and VmgDone() interfaces: - VmgInit() will take an extra parameter that is a pointer to a BOOLEAN that will hold the interrupt state at the time of invocation. VmgInit() will get and save this interrupt state before updating the GHCB. - VmgDone() will take an extra parameter that is used to indicate whether interrupts are to be (re)enabled. Before exiting, VmgDone() will enable interrupts if that is requested. Fixes: 437eb3f7a8db7681afe0e6064d3a8edb12abb766 Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <c326a4fd78253f784b42eb317589176cf7d8592a.1604685192.git.thomas.lendacky@amd.com>
2020-11-10OvmfPkg/VmgExitLib: Set the SwScratch valid bit for MMIO eventsTom Lendacky1-0/+5
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 All fields that are set in the GHCB should have their associated bit in the GHCB ValidBitmap field set. Add support to set the bit for the scratch area field (SwScratch). Fixes: c45f678a1ea2080344e125dc55b14e4b9f98483d Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <45ccb63c2dadd834e2c47bf10c9e59c6766d7eb6.1604685192.git.thomas.lendacky@amd.com>
2020-11-10OvmfPkg/VmgExitLib: Set the SwScratch valid bit for IOIO eventsTom Lendacky1-0/+1
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 All fields that are set in the GHCB should have their associated bit in the GHCB ValidBitmap field set. Add support to set the bit for the scratch area field (SwScratch). Fixes: 0020157a9825e5f5784ff014044f11c0558c92fe Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <f817d034cea37fa78e00e86f61c3445f1208226d.1604685192.git.thomas.lendacky@amd.com>
2020-11-10OvmfPkg/VmgExitLib: Set the SW exit fields when performing VMGEXITTom Lendacky1-0/+4
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 All fields that are set in the GHCB should have their associated bit in the GHCB ValidBitmap field set. Add support to set the bits for the software exit information fields when performing a VMGEXIT (SwExitCode, SwExitInfo1, SwExitInfo2). Fixes: 61bacc0fa16fd6f595a2c4222425cb6286e19977 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <986e157c13bf33e529b1d16ab1b52e99a74a734f.1604685192.git.thomas.lendacky@amd.com>
2020-11-10OvmfPkg/VmgExitLib: Implement new VmgExitLib interfacesTom Lendacky2-87/+85
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 The VmgExitLib library added two new interfaces, VmgSetOffsetValid() and VmgIsOffsetValid(), that must now be implemented in the OvmfPkg version of the library. Implement VmgSetOffsetValid() and VmgIsOffsetValid() and update existing code, that is directly accessing ValidBitmap, to use the new interfaces. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <939e9dc375e6085bc67942fe9a00ecd4c6b77ecf.1604685192.git.thomas.lendacky@amd.com>
2020-09-17OvmfPkg: drop redundant VendorID check in VirtioMmioDeviceLibLeif Lindholm1-15/+0
There is a DEBUG warning printout in VirtioMmioDeviceLib if the current device's VendorID does not match the traditional 16-bit Red Hat PCIe vendor ID used with virtio-pci. The virtio-mmio vendor ID is 32-bit and has no connection to the PCIe registry. Most specifically, this causes a bunch of noise when booting an AArch64 QEMU platform, since QEMU's virtio-mmio implementation used 'QEMU' as the vendor ID: VirtioMmioInit: Warning: The VendorId (0x554D4551) does not match the VirtIo VendorId (0x1AF4). Drop the warning message. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-08-17OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator functionTom Lendacky1-14/+35
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Create a function that can be used to determine if the VM is running as an SEV-ES guest. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-08-17OvmfPkg/VmgExitLib: Add support for DR7 Read/Write NAE eventsTom Lendacky1-0/+114
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a DR7 read or write intercept generates a #VC exception. The #VC handler must provide special support to the guest for this. On a DR7 write, the #VC handler must cache the value and issue a VMGEXIT to notify the hypervisor of the write. However, the #VC handler must not actually set the value of the DR7 register. On a DR7 read, the #VC handler must return the cached value of the DR7 register to the guest. VMGEXIT is not invoked for a DR7 register read. The caching of the DR7 values will make use of the per-CPU data pages that are allocated along with the GHCB pages. The per-CPU page for a vCPU is the page that immediately follows the vCPU's GHCB page. Since each GHCB page is unique for a vCPU, the page that follows becomes unique for that vCPU. The SEC phase will reserves an area of memory for a single GHCB and per-CPU page for use by the BSP. After transitioning to the PEI phase, new GHCB and per-CPU pages are allocated for the BSP and all APs. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-08-17OvmfPkg/VmgExitLib: Add support for MWAIT/MWAITX NAE eventsTom Lendacky1-0/+36
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a MWAIT/MWAITX intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-08-17OvmfPkg/VmgExitLib: Add support for MONITOR/MONITORX NAE eventsTom Lendacky1-0/+38
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a MONITOR/MONITORX intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-08-17OvmfPkg/VmgExitLib: Add support for RDTSCP NAE eventsTom Lendacky1-0/+47
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a RDTSCP intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-08-17OvmfPkg/VmgExitLib: Add support for VMMCALL NAE eventsTom Lendacky1-0/+48
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a VMMCALL intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-08-17OvmfPkg/VmgExitLib: Add support for INVD NAE eventsTom Lendacky1-0/+29
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a INVD intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-08-17OvmfPkg/VmgExitLib: Add support for RDPMC NAE eventsTom Lendacky1-0/+46
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a RDPMC intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
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