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2023-06-01MdePkg: don't set visibility to hiddenGerd Hoffmann1-14/+0
2023-05-17MdePkg: add SBI-based SerialPortLib for RISC-VAndrei Warkentin8-0/+767
2023-05-17MdePkg: BaseRiscVSbiLib: make more useful to consumersAndrei Warkentin2-6/+39
2023-05-12MdePkg/IndustryStandard: Add SMBIOS anchor string & length defines.Giri Mudusuru1-2/+20
2023-05-12MdePkg/IndustryStandard: Add IPMI Interface Capabilities definitionsTinh Nguyen1-0/+46
2023-05-12MdePkg: Add new PCDs for IPMI SSIFTinh Nguyen1-0/+27
2023-05-12MdePkg/IndustryStandard: Add definitions for IPMI SSIFTinh Nguyen1-0/+98
2023-05-11MdePkg: Add NULL library of TraceHubDebugSysTLibGua Guo4-0/+187
2023-05-11MdePkg: Add MipiSysTLib libraryGua Guo11-3/+1508
2023-05-11MdePkg: Add mipisyst submoduleGua Guo1-0/+0
2023-05-10MdePkg: Add more HobLib/PeiServicesLib gmock supportGua Guo7-0/+472
2023-05-05BaseSynchronizationLib: Fix LoongArch64 synchronization functionsDongyan Qian2-19/+13
2023-05-05MdePkg: Remove VS2008-VS2013 remnantsRebecca Cran2-12/+4
2023-05-05MdePkg/BasePeCoffLib: Deal with broken debug directoriesArd Biesheuvel1-0/+15
2023-05-05MdePkg: Support FDT library.Benny Lin15-1/+1232
2023-05-05Tianocore: Support FDT library.Benny Lin1-0/+0
2023-04-21MdePkg: Add DEBUG_MANAGEABILITY print error levelAbner Chang2-20/+23
2023-04-20MdePkg/Include: Add DMTF PLDM SMBIOS definitionsAbner Chang1-0/+183
2023-04-20MdePkg/Include: Add DMTF PLDM Base definitionsAbner Chang1-0/+82
2023-04-12MdePkg: Add new JedecJep106Lib to fetch JEDEC JEP106 manufacturerRebecca Cran5-0/+1898
2023-04-10MdePkg/Library/BaseLib: HOST_APPLICATION IA32/X64 onlyMichael D Kinney1-1/+1
2023-04-10MdePkg: Add gmock examplesChris Johnson8-0/+202
2023-04-07MdePkg/PeCoffLib: Capture DLL characteristics fields in image contextArd Biesheuvel3-12/+53
2023-04-03MdePkg: Fix conditionally uninitialized variablesMichael Kubacki1-8/+32
2023-04-01MdePkg/Base.h: Introduce various alignment-related macrosMarvin Häuser1-1/+97
2023-04-01MdePkg: Add TME-MK related CPUID and MSR definitionsRay Ni2-3/+112
2023-03-30MdePkg: Update MemoryAttributesTable to v2.10Ard Biesheuvel1-2/+6
2023-03-30MdePkg/BaseRngLib AARCH64: Make asm files BTI compatibleArd Biesheuvel2-2/+2
2023-03-30MdePkg/BaseSynchronizationLib AARCH64: Make asm files BTI compatibleArd Biesheuvel1-0/+5
2023-03-30MdePkg/BaseMemoryLibOptDxe AARCH64: Make asm files BTI compatibleArd Biesheuvel5-0/+9
2023-03-30MdePkg/BaseLib AARCH64: Make asm files BTI compatibleArd Biesheuvel8-0/+10
2023-03-30MdePkg/BaseLib AARCH64: Make LongJump() BTI compatibleArd Biesheuvel1-2/+1
2023-03-30MdePkg/BaseIoLibIntrinsic AARCH64: Make asm files BTI compatibleArd Biesheuvel1-0/+8
2023-03-30MdePkg/BaseCpuLib AARCH64: Make asm files BTI compatibleArd Biesheuvel2-0/+2
2023-03-30MdePkg/ProcessorBind AARCH64: Add asm macro to emit GNU BTI noteArd Biesheuvel1-0/+34
2023-03-26MdePkg/Include: Add IPMI KCS definitionsAbner Chang2-0/+82
2023-03-26MdePkg/Include: Add DMTF MCTP definitionsAbner Chang1-0/+139
2023-03-26MdePkg/Include/Ppi: Remove Itanium leftover data structurePaweł Poławski1-46/+5
2023-03-17MdePkg: Update code to be more C11 compliant by using __func__Rebecca Cran7-33/+33
2023-03-17MdePkg: Update Base.h to be compliant with C11Rebecca Cran1-6/+6
2023-03-16MdePkg: Add Memory Attribute Protocol definitionArd Biesheuvel2-0/+145
2023-03-16MdePkg/BaseCacheMaintenanceLib: RISC-V: Fix InvalidateInstructionCacheRangeTuan Phan1-1/+6
2023-03-10MdePkg: Move API and implementation from UefiCpuLib to CpuLibYu Pu5-0/+254
2023-03-08UefiCpuPkg: BaseRiscV64CpuExceptionHandlerLib: clean upAndrei Warkentin1-4/+30
2023-03-08MdePkg: BaseCpuLib: Fix RISCV CpuSleep symbol name.Andrei Warkentin1-2/+2
2023-03-08MdePkg: BaseLib: don't log in RISCV InternalSwitchStackAndrei Warkentin1-8/+0
2023-03-08MdePkg: BasePeCoffLib: Allow AArch64 and x64 images in ImageFormatSupportedAndrei Warkentin1-1/+9
2023-02-16MdePkg: Add BaseRiscVSbiLib Library for RISC-VSunil V L6-0/+460
2023-02-16MdePkg/BaseLib: RISC-V: Add few more helper functionsSunil V L6-4/+179
2023-02-16MdePkg/Register: Add register definition header files for RISC-VSunil V L2-0/+144
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