summaryrefslogtreecommitdiff
path: root/CorebootPayloadPkg
AgeCommit message (Collapse)AuthorFilesLines
2016-05-27CorebootModulePkg/PciHostBridgeLib: Fix PCI 64bit memory BAR size issueMaurice Ma1-1/+5
The current PCI 64bit memory BAR size calculation in PciHostBridgeLib assumes all 32 bits in the upper BAR are fully writable. However, platform might only support partial address programming, such as 40bit PCI BAR address. In this case the complement cannot be used for size calculation. Instead, the lowest non-zero bit should be used for BAR size calculation. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-23CorebootPayloadPkg: Consume PlatformHookLib in PlatformBootManagerLibMaurice Ma1-1/+2
When coreboot uses different baud rate from the default (115200), the current BDS driver will not be able to enable serial console display due to the inconsistent serial port PCD settings. By adding the PlatformHookLib reference in the inf file, it will enforce the PCDs to be aligned with what have been passed from coreboot. Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Lee Leahy <leroy.p.leahy@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Lee Leahy <leroy.p.leahy@intel.com>
2016-05-23CorebootPayloadPkg: Use generic PciBus/PciHostBridge driverMaurice Ma7-10/+976
Current CorebootPayloadPkg uses PciBusNoEnumerationDxe and PciRootBridgenoEnumerationDxe copied from the DuetPkg. Now it will switch to use the standard PciBusDxe and PciHostBridgeDxe from MdeModulePkg. As a result, a coreboot specific PciHostBridgeLib is added to collect pre-allocated PCI resources. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-23CorebootPayloadPkg/PlatformBootManagerLib: Fix Linux buildLeahy, Leroy P1-2/+1
Fix Linux build failure with GCC 4.8.4 due to missing braces. Change-Id: Ic0de6520605149f1bb74f8b60ce8cab8beda10a4 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-05-20CorebootPayloadPkg: Remove BdsPlatform libraryMaurice Ma4-1298/+0
Since the new BdsDxe driver in MdeModulePkg is used, the old BdsPlatform library is not used any more and should be removed. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-20CorebootPayloadPkg: Switch to use generic BdxDxe driverMaurice Ma4-14/+55
Switch over to use BdxDxe generic driver in MdeModulePkg. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-20CorebootPayloadPkg: Add coreboot PlatfromBootManagerLib implementationMaurice Ma7-12/+1133
In order to use the generic BdsDxe in MdeModulePkg, a platform specific PlatfromBootManagerLib is required. This library will help update the ConIn, ConOut and ErrOut variables. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
2016-05-13CorebootPayloadPkg: Use generic SerialDxe driverMaurice Ma3-6/+3
Use generic SerialDxe driver in MdeModulePkg instead of the one in CorebootModulePkg. By doing this the reference for PciSioSerialDxe driver will also be removed from DSC and FDF file. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
2016-05-12CorebootPayloadPkg: Add OHCI driverLeahy, Leroy P3-49/+64
Add the USB OHCI driver from revision 24ca2f35 of QuarkSocPkg. Change-Id: Ie7aa0bc47d4ff06adc57976a5efb0e40ce4e1673 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-05-12CorebootPayloadPkg: Add SD/eMMC supportLeahy, Leroy P3-0/+21
Add SD and eMMC DXE driver support to CorebootPayloadPkg. Change-Id: Ibfd3a2cc32a653ce51e38d9157ea3c6da25a5474 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12CorebootPayloadPkg: Set the proper Shell file GUIDLeahy, Leroy P2-0/+22
Set the proper Shell file GUID so that the BDS transfers control to the Shell. Change-Id: I816636a340bbe2f76ac1973b9cb685084c4f88a0 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12CorebootPayloadPkg: Use correct BaseSerialPortLib16550Leahy, Leroy P2-2/+2
Use the BaseSerialPortLib16550 which sets RTS and DTR during initialization. This fixes the mis-matched flow control issue when the flow control signals are connected between the host and target and the host has flow control enabled. Change-Id: I3505e129b2de3c5c17fff23c62553f15cd892dca Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12CorebootPayloadPkg: Assume no PCI serial devicesLeahy, Leroy P2-4/+4
Set the vendor to 0xffff which indicates the end of the list. Change-Id: If6475e04d3675f0a932571a85d1dd3f301416b6a Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> eviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12CorebootPayloadPkg: Use DOS line endingsLeahy, Leroy P3-460/+455
Convert to using DOS line endings. Change-Id: Ie2f148867d9b2b386d556583afb6716ec21399e9 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-05-10CorebootPayloadPkg/PlatformBdsLib: Pass more serial parametersLeahy, Leroy P4-5/+71
Pass the serial port baudrate, register stride, input clock rate and ID from coreboot to CorebootPayloadPkg. Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05CorebootPayloadPkg: Use serial drivers with PlatformHookLibLeahy, Leroy P3-3/+6
Use the serial drivers which update the serial PCDs from PlatformHookLib. Change-Id: Ie6a3526d56332ee1cf07edb24ff39634a981183f Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05CorebootPayloadPkg: Allow MaxLogicalProcessorNumber to be changedLeahy, Leroy P2-0/+14
Add a define and use it with MaxLogicalProcessorNumber to enable this PCD to be changed via the command line. Quark needs to set this value to one during the builds. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05CorebootPayloadPkg: Make serial I/O configurableLeahy, Leroy P2-16/+131
Allow the serial port configuration to be overriden from the command line. Make the debug serial PCDs patchable in module. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05CorebootPayloadPkg: Make shell selectableLeahy, Leroy P3-6/+170
Add all of the shell options from ShellBinPkg including building the shell from source. Enable link time optimization for GCC debug builds to keep the size under 0x3e0000. Test: Use -DSHELL_TYPE=BUILD_SHELL command line options to build the shell from source. Run the result on Galileo Gen2. Change-Id: I1e12adb57960ac5e75e682073540a9322aa03081 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-02CorebootModulePkg: Remove DuetPkg referencesLeahy, Leroy P3-9/+9
Remove the references to DuetPkg. Copy the files from revision ffea0a2ce21e8e9878587de2419959a7bfea4021 of DuetPkg into CorebootModulePkg. The components include: * PciBusNoEnumerationDxe * PciRootBridgeNoEnumerationDxe * SataControllerDxe TEST=Build and run on Galileo Gen2 Change-Id: Id07185f7e226749e5f7c6b6cb427bcef7eac8496 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-02CorebootPayloadPkg: Remove trailing white spaceLeahy, Leroy P3-133/+126
Remove trailing white space from existing .dsc and .fdf files. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-04-07CorebootPayloadPkg: Convert to build FatPkg from sourceJusten, Jordan L3-8/+6
Now that FatPkg is open source (and therefore can be included in the EDK II tree) we build and use it directly. Note: Build tested with GCC 5.3 on IA32 and IA32+X64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-03-25CorebootPayloadPkg: PlatformBdsLib: remove set but unused variablesLaszlo Ersek1-2/+0
Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-03-25CorebootPayloadPkg: FbGop: remove set but unused variablesLaszlo Ersek1-11/+6
Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-03-07FW: [PATCH 3/9] CorebootPayloadPkg/PlatformBdsLib: Fix spelling errorLeahy, Leroy P3-4/+4
-----Original Message----- From: Leahy, Leroy P Sent: Friday, March 4, 2016 8:58 AM To: Ni, Ruiyu <ruiyu.ni@intel.com>; edk2-devel@lists.01.org; Bjorge, Erik C <erik.c.bjorge@intel.com> Cc: Leahy, Leroy P <leroy.p.leahy@intel.com> Subject: [PATCH 3/9] CorebootPayloadPkg/PlatformBdsLib: Fix spelling error Change vender to vendor Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2015-11-30CorebootPayloadPkg PlatformHookLib: Fix GCC build failureStar Zeng1-3/+9
Add return status check to fix GCC build failure below. error: right-hand operand of comma expression has no effect [-Werror=unused-value] ((_gPcd_BinaryPatch_PcdSerialUseMmio = (Value)), RETURN_SUCCESS) error: right-hand operand of comma expression has no effect [-Werror=unused-value] ((_gPcd_BinaryPatch_PcdSerialRegisterBase = (Value)), RETURN_SUCCESS) http://article.gmane.org/gmane.comp.bios.edk2.devel/4949 Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Suggested-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19069 6f19259b-4bc3-4df7-8a09-765794883524
2015-11-26CorebootPayloadPkg: Use SerialDxe in MdeModulePkgStar Zeng9-794/+92
1. Update fdf and dsc to use SerialDxe in MdeModulePkg. 2. Separate the code that gets SerialRegBase and SerialRegAccessType by CbParseLib from CorebootPayloadPkg/Library/SerialPortLib to PlatformHookLib, and then leverage BaseSerialPortLib16550 in MdeModulePkg. 3. Remove CorebootPayloadPkg/SerialDxe and CorebootPayloadPkg/Library/SerialPortLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18968 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-27CorebootPayloadPkgIa32: Don't specify X64 architectureJordan Justen1-1/+1
CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc doesn't use any X64 modules, so it should not specify the X64 architecture. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18073 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-25CorebootPayloadPkg: Fix "reset -s" issue.Guo Dong1-2/+29
Fix reboot issue after issuing shell command "reset -s" from UEFI payload. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17715 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-11CorebootPayloadPkg: Replace PciHostBridge driver with PciRootBridgeNoEnumerationMaurice Ma3-4/+4
Current CorebootPayloadPkg uses PciHostBridge and PciBusNoEnumeration driver. It will cause the PCI bus resource incorrectly set in root bridge instance. As a result all PCI devices behind a PCI bridge will not show up in Shell 'PCI' command. To resolve it use PciRootBridgeNoEnumeration driver instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17408 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-06CorebootPayloadPkg: Use the new PCDs defined in MdePkg.Ruiyu Ni1-1/+1
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17325 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-14Coreboot*Pkg/Contributions.txt: Update example email addressJordan Justen1-2/+2
Use the example.com domain as recommended in RFC 2606. This was changed for the other EDK II packages in r16724. NOTE: This does not modify the wording of the "TianoCore Contribution Agreement 1.0" section Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17169 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-14CorebootPayloadPkg: Rename CorebootPayloadPkgX64.dsc X64 -> Ia32X64Jordan Justen2-2/+2
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17168 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-14CorebootPayloadPkg: Rename CorebootPayloadPkgIA32.dsc IA32 -> Ia32Jordan Justen2-11/+2
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17167 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootPayloadPkg: Remove empty folder reference in DEC fileMaurice Ma1-3/+0
In current CorebootPayloadPkg.dec an empty 'Include' directory is listed in [includes] section. However, this empty directory will not be mirrored into git repo. If the source tree is pulled from git, the 'Include' empty folder will not exist and it will cause build failure. The fix is to remove the whole [Includes] section in the DEC file. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17164 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootPayloadPkg: Avoid page table memory allocation failureScott Duplichan1-0/+1
Enable use of 1GB pages to avoid page table memory allocation failure. The failure occurs when allocating enough 4KB pages to map a large virtual address space, such as the 48-bit virtual address space of AMD family 10h and family 15h processors. The change is needed only for the X64 build because page tables are not used by the IA32 build. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17151 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootPayloadPkg: Use unique path for IA32 and X64 payload binariesScott Duplichan2-2/+2
Use unique output directory names so that both IA32 and X64 payloads can be built without overwriting one another. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17150 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootPayloadPkg: Add NOOPT build to accommodate source level debuggingScott Duplichan2-2/+2
Add NOOPT build to accommodate source level debugging. The NOOPT build avoids the use of compiler optimization so that every local variable is accessible by a source level debugger. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17149 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootPayloadPkg: Increase payload size limitScott Duplichan1-4/+4
Increase payload size limit to accomodate large binaries, such as those produced by Microsoft NOOPT builds and gcc DEBUG builds. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17148 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootPayloadPkg: Use extra braces to prevent gcc compile failScott Duplichan1-3/+3
Use extra braces around initialization data to prevent gcc compile error: -Werror=missing-braces. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17147 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-31Pkg-Module: CorebootPayloadPkgMaurice Ma21-0/+6082
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot. CorebootPayloadPkg is source code package of coreboot Payload Modules, Provides definitions of payload image's layout and lists the modules required in DSC file. It supports the following features: - Support Unified Extensible Firmware Interface (UEFI) specification 2.4. - Support Platform Initialization(PI) specification 1.3. - Support execution as a coreboot payload. - Support USB 3.0 - Support SATA/ATA devices. - Support EFI aware OS boot. The following features are not supported currently and have not been validated: - GCC Tool Chains - SMM Execution Environment - Security Boot It was tested on a Intel Bay Trail CRB platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17081 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-25Pkg-Module: Add Coreboot Payload Packagelaurie01312-0/+243
Full-commit-message Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: laurie0131 <Laurie.jarlstrom@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17074 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.1 at 2024-07-31 10:33:12 +0000