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2018-06-11CorebootModulePkg/CbSupportDxe: Remove SCI_EN settingBenjamin You2-1/+36
Current implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event. However, this should not be done because this causes OS to skip triggering FADT.SMI_CMD, which leads to the functions implemented in the SMI handler being omitted. This issue was identified by Matt Delco <delco@google.com>. The fix does the following: - The SCI_EN bit setting is removed from CbSupportDxe driver. - Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to output some error message and ASSERT (FALSE) if ALL of the following conditions are met: 1) HARDWARE_REDUCED_ACPI is not set; 2) SMI_CMD field is zero; 3) SCI_EN bit is zero; which indicates the ACPI enabling status is inconsistent: SCI is not enabled but the ACPI table does not provide a means to enable it through FADT->SMI_CMD. This may cause issues in OS. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Matt Delco <delco@google.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Benjamin You <benjamin.you@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Matt Delco <delco@google.com>
2016-10-27CorebootModulePkgPkg: Expose FindCbTag API from CbParseLibgdong11-0/+10
CbPlatformSupportLib might use FindCbTag() API to parse platform specific information. So expose this API. And add EFIAPI to all functions in CbParseLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-10-26CorebootModulePkg: Fix memmap issuegdong11-60/+42
Some reserved memory (e.g. CSE reserved memory) might be in the middle of usable physical memory. The current memory map caculation could not handle this case. This patch fixed this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: gdong1 <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-10-26CorebootModulePkg: Add a library to parse platform specific info.gdong13-0/+89
Update CbSupportPei to consume the new library, so platform could provide platform specific library instance to parse platform specif info. And add a NULL library instance to pass build. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: gdong1 <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-05-10CorebootPayloadPkg/PlatformBdsLib: Pass more serial parametersLeahy, Leroy P1-7/+25
Pass the serial port baudrate, register stride, input clock rate and ID from coreboot to CorebootPayloadPkg. Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-10CorebootModulePkg/BaseSerialPortLib: Set DTR and RTSLeahy, Leroy P1-2/+3
Ensure communication between the host and the UEFI system running CorebootPayloadPkg. In cases where the host has flow control enabled and the serial connection is providing the flow control signals, the host will not be able to send data to the UEFI system because DTR and RTS are not present. The host may also discard all output data from the UEFI system because DTR is not present. By setting DTR and RTS in the UART initialization code this case works properly. Change-Id: I393f57104d111472cafcae01d4e43d4ea837be3b Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-10CorebootModulePkg/BaseSerialPortLib16550: Remove white-spaceLeahy, Leroy P2-64/+64
Remove trailing white space. Change-Id: I73c3a3e1e55eec20b09443de1966573c97fa74f8 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-10CorebootModulePkg: Add BaseSerialPortLib16550Leahy, Leroy P3-0/+1164
Copy MdeModulePkg/Library/BaseSerialPortLib16550 revision 89ecd4cf8078aa946083cdcbf9af81ff29f8d9f5. Change-Id: Ie2fd0123bdd7aaba4335afdb1cb017f3690455c6 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-02-26CorebootModulePkg-CbParseLib: Fix bad reference in CbParseLibLeahy, Leroy P1-1/+2
Dereferencing pMemTableSize in debug statement displays bad values when it is set to NULL. Display the actual table size value instead. TEST=Build and run on Galileo Gen2 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-02-26CorebootModulePkg-CbParseLib: Add ACPI table verificationLeahy, Leroy P1-0/+9
Verify the register address in the FADT. TEST=Build and run on Galileo Gen2 when the FADT was not present. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2015-07-01CorebootModulePkg: Get power management register addresses.Guo Dong1-1/+24
This patch will get power management event register address and power management GPE enable register address. Add missing code in CbParseLib.c. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17791 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27CorebootModulePkg: Fix GCC build failure.Guo Dong1-1/+1
This patch fixed a GCC build failure issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17519 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-20CorebootModulePkg/CbParseLib: Coding style updateGuo Dong1-88/+159
This patch update file CbParseLib.c to make it consistent with EDKII coding style: 1) Add function comments. 2) Add {} for if statement. 3) Compare with NULL for pointer and compare with 0 for integer instead of using them like a BOOLEAN. 4) For debug information only, use EFI_D_INFO instead of EFI_D_ERROR 5) Correct IN, OUT modifier Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17487 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-20CorebootModulePkg/CbParseLib: Fix coding issue in ACPIGuo Dong1-3/+3
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17486 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-20CorebootModulePkg/CbParseLib: Remove tab and spacesGuo Dong1-247/+245
Replace tab with space. Remove the sapce at the end of lines. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17485 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-20CorebootModulePkg/CbParseLib: Support current Coreboot IMDGuo Dong1-14/+38
The latest coreboot use IMD (In Memory Database) to report Tables. This patch adds IMD support in UEFI payload. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17484 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootModulePkg: DEBUG print format correctionsScott Duplichan1-7/+7
Fix DEBUG print formats so that pointers and 64-bit integer values display correctly for both 32-bit and 64-bit builds. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17153 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootModulePkg: Change CbParseAcpiTable prototype to avoid gcc failScott Duplichan1-2/+2
Use of void** as a generic pointer to pointer is a Microsoft extension to the C language and is not supported by gcc. Without this change, gcc compile fails with error: passing argument 1 of 'CbParseAcpiTable' from incompatible pointer type note: expected 'void **' but argument is of type 'struct EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER **' Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17144 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootModulePkg: Remove unused static functions to prevent gcc build failScott Duplichan1-10/+0
The gcc build will fail with -Werror=unused-function when a compilation unit defines a static function but never calls it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17143 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10CorebootModulePkg: Fix build failure with 32-bit NOOPT targetScott Duplichan1-1/+1
Fix build failure with 32-bit NOOPT target by replacing direct shift of 64-bit integer with a function call. Otherwise Microsoft tool chains will generate a call to function __allshl and fail to link. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17142 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-31Pkg-Module: CorebootModulePkgMaurice Ma2-0/+611
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot. CorebootModulePkg is the source code package of coreboot support modules that will be used to parse the coreboot tables and report memory/io resources. It supports the following features: - Support Unified Extensible Firmware Interface (UEFI) specification 2.4. - Support Platform Initialization(PI) specification 1.3. - Support execution as a coreboot payload. - Support USB 3.0 - Support SATA/ATA devices. - Support EFI aware OS boot. The following features are not supported currently and have not been validated: - GCC Tool Chains - SMM Execution Environment - Security Boot It was tested on a Intel Bay Trail CRB platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17084 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.1 at 2024-09-08 05:19:53 +0000