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2015-02-28ArmVirtualizationPkg: Xen/PV relocatable platformlib instanceArd Biesheuvel5-0/+617
Add a ArmPlatformLib instance that can deal with the self relocation and truly dynamic discovery of system RAM base and size. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16964 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmVirtualizationPkg: allow patchable PCD for FV and DT base addressesArd Biesheuvel1-2/+4
Allow the use of patchable PCDs for gArmTokenSpaceGuid.PcdFvBaseAddress and gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress by moving them from the [FixedPcd] to the [Pcd] section in the INF file of PlatformPeiLib. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16963 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmVirtualizationPkg: implement custom MemoryInitPeiLibArd Biesheuvel2-0/+157
This implements a MemoryInitPeiLib instance that differs from the stock ArmPlatformPkg version only in the fact that it does not remove the memory used by the flash device (FD). The reason is that, when using PrePi, the DXE core is started immediately and never returns so there is no reason to preserve any of the memory that the flash device occupied originally, and it is preferable to release is so that the OS loader can reuse it. This is especially important for the relocatable PrePi configuration, which is aimed at being launched from a boot loader that itself adheres to the Linux arm64 boot protocol. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martn@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16962 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmVirtualizationPkg: add a relocatable version of PrePiArd Biesheuvel7-0/+746
This patch introduces a relocatable PrePi, which can execute from arbitrary offsets in RAM. This is intendend to be run from a boot loader which passes a description of the actual platform in a device tree, for instance. This module is based on the PrePi implementations residing under ArmPlatformPkg. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16961 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmVirtualizationPkg: add padding to FDT allocationArd Biesheuvel3-3/+12
Our primary user QEMU/mach-virt presents us with a FDT blob padded to 64 KB with plenty of room to set additional properties. However, in the general case, we should only add properties after making sure there is enough room available. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16960 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmVirtualizationPkg: use a HOB to store device tree blobArd Biesheuvel7-16/+20
Instead of using a dynamic PCD, store the device tree address in a HOB so that we can also run under a configuration that does not support dynamic PCDs. This also adds MemoryAllocationLib to the [LibraryClasses] section of ArmVirtualizationPlatformLib/ArmVirtualizationPlatformLib.inf, as this dependency was formerly satisfied transitively through one of the library dependencies that were dropped. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16959 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmVirtualizationPkg: move early UART discovery to PlatformPeimArd Biesheuvel4-47/+53
This is partially motivated by the desire to use PrePi in a virt environment, and in that configuration, ArmPlatformInitializeSystemMemory() is never called. But actually, this is a more suitable place anyway. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16958 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmVirtualizationPkg: allow patchable PCD for device tree base addressArd Biesheuvel2-2/+2
To allow a runtime self relocating PrePi instance to discover the base address of the device tree at runtime, allow the use of a patchable PCD for gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress. We will not be using the build time patch tool in this case, but using a patchable PCD will make the build system aware that its value is not a compile time constant. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16957 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmVirtualizationPkg: add GICv3 detection to VirtFdtDxeArd Biesheuvel3-1/+35
This adds support for detecting the presence of a GICv3 interrupt controller from the device tree, and recording its distributor and redistributor base addresses in their respective PCDs. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16956 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmPlatformPkg: allow patchable PCD for FD base addressArd Biesheuvel1-1/+1
This moves the reference to gArmTokenSpaceGuid.PcdFdBaseAddress from the [FixedPcd] to the [Pcd] section in the INF file of PrePiArmPlatformGlobalVariableLib so that its users may choose to use a patchable PCD instead. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16955 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmPkg: allow HYP timer interrupt to be omittedArd Biesheuvel1-3/+3
The DT binding for the ARM generic timer describes the secure, non-secure, virtual and hypervisor timer interrupts, respectively. However, under virtualization, only the virtual timer is usable, and the device tree may omit the hypervisor timer interrupt. (Other timer interrupts cannot be omitted simply due to the fact that the virtual timer is listed third) Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16953 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/ArmJunoPkg: Create two default boot entries on first boot on ↵Olivier Martin2-4/+163
Juno R1 Juno R1 can run in two configurations: - A57x2 - A57x2-A53x4 The Device Tree tell Linux which configuration has been selected. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16942 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/ArmJunoPkg: Update with Juno R1 device tree namesOlivier Martin3-9/+11
Juno R1 support two configurations: - A57x2 - A57x2-A53x4 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16941 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/Bds: Remove any use of the "Fdt" UEFI variableRonald Cron15-121/+20
Remove the option to update the "Fdt" UEFI variable in the ARM BDS as the "setfdt" EFI Shell command provides this service from now. Remove the use of this variable in the legacy kernel boot loader and use the FDT installed in the configuration table instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16940 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/ArmJunoDxe: Set the platform dependent FDT device pathRonald Cron6-24/+83
The MIDR register of the CPU on which the UEFI firmware is running on is used to infer if the platform is a Juno r0 or a Juno r1. The right device path to the platform FDT is then stored in the "gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths" dynamic PCD. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16939 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/ArmJunoPkg : Use FdtPlatformDxe driver to install the FDTRonald Cron11-503/+31
Remove the installation of the FDT for Juno into the UEFI Configuration Table from the Juno specific DXE driver. Use the FdtPlatformDxe driver to do it instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16938 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/ArmVExpressDxe: Load FDT into the EFI Configuration TableRonald Cron29-55/+340
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16937 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmPlatformPkg/ArmVExpressPkg: Added support to differentiate ARMv8 FVP variantsOlivier Martin5-20/+75
There are three FVP variants for the Base and Foundation models: - model with GICv2 legacy memory map (same location as the Versatile Express model) - model with GICv2 and Base model memory map - model with GICv3 and Base model memory map The new code detects the variants to load the appropriate device tree. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16932 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmPlatformPkg/ArmVExpressDxe: Identify the current platformOlivier Martin11-18/+365
Add a function to ArmVExpressDxe to identify the current platform we are running on. This includes ARM32 and AArch64 models and hardware. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16931 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmPlatformPkg/ArmVExpress-FVP-AArch64.dsc: Switch to Linux kernel with EFI ↵Olivier Martin1-3/+3
stub by default Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16929 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmPlatformPkg/ArmJuno: Use EFI Stub and updated the command lineOlivier Martin1-2/+4
- 'earlycon' is the new name for 'earlyprintk' - Support Linux EFI stub by default - The command line is expected to be in unicode when booting an EFI application. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16928 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmVirtualizationPkg/QemuFwCfgLib: Fixed build errorOlivier Martin1-1/+1
ARM toolchain raises the build error: Error #188-D: enumerated type mixed with another type Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16927 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmVirtualizationPkg: PlatformIntelBdsLib: display TianoCore logoLaszlo Ersek3-0/+15
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16925 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmVirtualizationPkg: PlatformIntelBdsLib: detect consoles dynamicallyLaszlo Ersek2-0/+354
Detect the video displays dynamically, and add them to the console and error output variables. Add a short-form, "wild card" USB_CLASS_DEVICE_PATH to the console input variable, which causes the USB keyboard to be handled automatically. Add the fixed location serial console to all of the console input, console output, and error output variables. This patch enables QEMU users to drop "addr=..." PCI address specifications from the -device options (or to use whatever addresses they like). For example, the following works: -device VGA \ \ -device ich9-usb-ehci1,multifunction=on,id=ehci \ -device ich9-usb-uhci1,multifunction=on,masterbus=ehci.0,firstport=0 \ -device ich9-usb-uhci2,multifunction=on,masterbus=ehci.0,firstport=2 \ -device ich9-usb-uhci3,multifunction=on,masterbus=ehci.0,firstport=4 \ -device usb-kbd,bus=ehci.0 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16924 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmVirtualizationPkg: PlatformIntelBdsLib: remove ties to ARM BDSLaszlo Ersek4-202/+6
In this patch we remove all dependencies on ARM BDS libraries. We also remove empty and/or unneeded functions, includes, etc. PlatformIntelBdsLib "goes back to basics" temporarily -- there are no consoles configured, and it's practically not possible to interact with the user interface. Bisection remains available in the sense that "ArmVirtualizationQemu.dsc" continues to build and should boot preexistent boot options, but user interaction does regress temporarily. The reason for this is that it's preferable to keep this patch and the next one separate for readability's sake -- they amount to a rewrite from scratch. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16923 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmVirtualizationPkg: PlatformIntelBdsLib: beautify sourceLaszlo Ersek3-31/+33
This patch introduces no functional changes. It sorts #include directives, sorts INF file sections, and reformats license blocks. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16922 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/ArmVirtualizationQemu: add USB keyboard inputLaszlo Ersek3-2/+33
Similarly to the previous patch, we can now multiplex input from the USB keyboard. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16914 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/ArmVirtualizationQemu: add VGA console outputLaszlo Ersek2-2/+32
Alex Graf's QEMU patchset enables "-device VGA" for the virt machtype as well. We can now include OvmfPkg/QemuVideoDxe in the firmware, and set PcdDefaultConOutPaths such that the console output is multiplexed to the video window as well. (Our platform BDS lib doesn't (yet) locate the VGA device automatically.) OvmfPkg/PlatformDxe is included too; it allows users to select a video resolution. (Note that PcdSetupVideoHorizontalResolution and PcdSetupVideoVerticalResolution are independent; see git commit 848834cb (SVN r16311) for explanation.) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16913 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg: PlatformIntelBdsLib: fix multiconsole setupLaszlo Ersek1-98/+3
In the following call chain: PlatformBdsPolicyBehavior() PlatformBdsConnectConsole() InitializeConsolePipe() x 3 BdsConnectDevicePath() [ArmPkg/Library/BdsLib/BdsFilePath.c] the three InitializeConsolePipe() function calls pass through - (&gST->ConsoleOutHandle, &gST->ConOut), - (&gST->ConsoleInHandle, &gST->ConIn), - (&gST->StandardErrorHandle, &gST->StdErr) to BdsConnectDevicePath(), in ArmPkg's BdsLib. At least when more than one console device paths are specified in the ConIn / ConOut / ErrOut variables, the above resuls in: - unchanged protocol interfaces (ConOut, ConIn, StdErr) in the system table (because ConSplitterDxe installs its non-NULL interfaces first), - but, changed handles in the system table. This effectively separates the handle fields in the system table from the protocol interfaces in the same that should always be associated with the handles. The end result is that clients using the handles break (splitting / multiplexing doesn't work for them), while clients directly using the protocol interfaces work. Therefore, do not attempt to connect consoles separately. ConSplitterDxe is dispatched before PlatformBdsPolicyBehavior() is called (the latter happens in the BDS phase), and ConSplitterDxe installs virtual handles and protocol interfaces for input / output / error. BdsLibConnectAll() covers all devices, including consoles; as those consoles are connected, ConPlatformDxe and ConSplitterDxe pick them up nicely as "slaves". We just need to make sure that the variables are set first, for the variables -> ConPlatformDxe -> ConSplitterDxe dependency chain. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16912 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg: PlatformIntelBdsLib: kernel boot should provide ACPILaszlo Ersek1-3/+6
If there is a PCI host, then PCI enumeration (which happens inside BdsLibConnectAll()) blocks ACPI table installation (correctly). Make sure we install ACPI tables before trying to direct-boot a QEMU kernel. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16911 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/ArmVirtualizationQemu: enable PCI supportLaszlo Ersek3-1/+19
Beyond including the foundational drivers in the DSC and FDF files, we enable virtio-over-PCI, and turn on QemuBootOrderLib's OFW-to-UEFI device path translation for PCI devices. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16910 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg: clone BasePciExpressLib, cache PCIe config baseLaszlo Ersek2-0/+1475
The BarExisted() function in "MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c" raises the TPL to TPL_HIGH_LEVEL before accessing PCI config space. The PciExpressLib instance under "MdePkg/Library/BasePciExpressLib" -- serving the PCI config space access -- calls PcdGet64(PcdPciExpressBaseAddress) in turn, for each such call. The PcdGet64() function, when issued at TPL_HIGH_LEVEL, triggers an ASSERT(). PcdGet64() is based on a protocol in this UEFI phase, and protocol handler services are not allowed above TPL_NOTIFY (see Table 23 "TPL Restrictions" in the UEFI spec). Clone the library, and in a new constructor, cache the PCD in a global variable. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16909 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: handle 0 in GetProposedResources()Laszlo Ersek1-1/+9
When there are no devices connected to the root bridge, no resources are needed. GetProposedResources() currently considers this an invalid condition (the PI spec doesn't regulate it). Emitting an empty set of EFI_ACPI_ADDRESS_SPACE_DESCRIPTORs, followed by the required EFI_ACPI_END_TAG_DESCRIPTOR, allows PciHostBridgeResourceAllocator() [MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c] to advance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16908 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: skip 0 AddrLen in SubmitResources()Laszlo Ersek1-3/+8
According to Volume 5 of the PI spec, 10.8.2 PCI Host Bridge Resource Allocation Protocol, SubmitResources(), It is considered an error if no resource requests are submitted for a PCI root bridge. If a PCI root bridge does not require any resources, a zero-length resource request must explicitly be submitted. Under MdeModulePkg/Bus/Pci/PciBusDxe/, we have: PciHostBridgeResourceAllocator() [PciLib.c] ConstructAcpiResourceRequestor(..., &AcpiConfig) [PciEnumerator.c] PciResAlloc->SubmitResources(..., &AcpiConfig) ASSERT_EFI_ERROR () If ConstructAcpiResourceRequestor() finds no resources to request (for example because no PCI devices are on the root bridge), it places a zero-length EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR followed by an EFI_ACPI_END_TAG_DESCRIPTOR in "AcpiConfig"; satisfying the PI spec. However, PciHostBridgeDxe's SubmitResources() function does not expect such input; the following part of the code rejects it: switch (Ptr->ResType) { case 0: // // Check invalid Address Sapce Granularity // if (Ptr->AddrSpaceGranularity != 32) { return EFI_INVALID_PARAMETER; } Skip EFI_ACPI_ADDRESS_SPACE_DESCRIPTORs with zero AddrLen early. Also, allow PciHostBridgeResourceAllocator() to proceed to the AllocateResources phase by setting "ResourceSubmited" to TRUE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16907 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: get MMIO BARs from our own apertureLaszlo Ersek1-1/+2
This is our MMIO space map: > GCD:AddMemorySpace(Base=0000000010000000,Length=000000002EFF0000) > GcdMemoryType = MMIO > Capabilities = 0000000000000001 > Status = Success > GCDMemType Range Capabilities Attributes > ========== ================================= ================ ================ > NonExist 0000000000000000-0000000003FFFFFF 0000000000000000 0000000000000000 > MMIO 0000000004000000-0000000007FFFFFF C000000000000001 8000000000000001 NorFlashDxe adds this, but does not allocate it. > NonExist 0000000008000000-000000000900FFFF 0000000000000000 0000000000000000 > MMIO 0000000009010000-0000000009010FFF C000000000000001 8000000000000001 Added by RealTimeClockRuntimeDxe, but also not allocated. > NonExist 0000000009011000-000000000FFFFFFF 0000000000000000 0000000000000000 > MMIO 0000000010000000-000000003EFEFFFF C000000000000001 0000000000000000 Added by ourselves. > NonExist 000000003EFF0000-000000003FFFFFFF 0000000000000000 0000000000000000 > SystemMem 0000000040000000-00000000BFFFFFFF 800000000000000F 0000000000000008* > NonExist 00000000C0000000-0000FFFFFFFFFFFF 0000000000000000 0000000000000000 In the EfiPciHostBridgeAllocateResources phase, we allocate memory BARs bottom up, from whichever MMIO range comes first and has room left. Unfortunately, this places memory BARs into MMIO ranges that belong to other devices. (Arguably, their respective drivers should not just add, but immediately allocate those ranges as well.) ( This problem is not seen in OVMF / PcAtChipsetPkg, because there we allocate bottom-up from the range [max(2GB, top-of-low-RAM), 0xFC000000). (See the MMIO resource descriptor HOB created in MemMapInitialization() [OvmfPkg/PlatformPei/Platform.c].) That MMIO range fits in the static [2GB, 4GB) aperture given in "mResAperture" in PcAtChipsetPkg/PciHostBridgeDxe; plus other MMIO ranges (IO-APIC, HPET, LAPIC, flash chip) are higher than 0xFC000000. Hence the bottom-up BAR allocation in OvmfPkg always finds the right MMIO range first. ) In ArmVirtualizationPkg/PciHostBridgeDxe we can solve the problem by working our way downwards from the top of our own aperture. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16906 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: allocate IO BARs top-downLaszlo Ersek1-1/+2
Currently we allocate IO BARs bottom-up in the EfiPciHostBridgeAllocateResources phase of the enumeration. > GCD:AddIoSpace(Base=0000000000000000,Length=0000000000010000) > GcdIoType = I/O > Status = Success > GCDIoType Range > ========== ================================= > I/O 0000000000000000-000000000000FFFF Because the IO aperture is based at zero, the first allocation happens to get the zero address. However, a zero address for a PCI BAR is considered unmapped; see eg.: - <http://www.pcisig.com/reflector/msg00459.html>, - the (new_addr == 0) part in QEMU, pci_bar_address() [hw/pci/pci.c]: new_addr = pci_get_long(d->config + bar) & ~(size - 1); last_addr = new_addr + size - 1; /* Check if 32 bit BAR wraps around explicitly. * TODO: make priorities correct and remove this work around. */ if (last_addr <= new_addr || new_addr == 0 || last_addr >= UINT32_MAX) { return PCI_BAR_UNMAPPED; } We can avoid this problem by allocating top-down in the IO aperture. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16905 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: MMIO aperture must not be uncachedLaszlo Ersek4-2/+50
Quite non-intuitively, we must allow guest-side writes to emulated PCI MMIO regions to go through the CPU cache, otherwise QEMU, whose accesses always go through the cache, may see stale data in the region. This change makes no difference for QEMU/TCG, but it is important for QEMU/KVM, at the moment. Because gDS->SetMemorySpaceAttributes() is ultimately implemented by EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes() -- see "MdeModulePkg/Core/Dxe/Gcd/Gcd.c" and "ArmPkg/Drivers/CpuDxe/" -- we add the CPU architectural protocol to the module's DepEx. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16904 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: add room for PCI resource allocationLaszlo Ersek1-0/+22
VirtFdtDxe parses the following address space properties from the DTB (and saves them in PCDs) : ProcessPciHost: Config[0x3F000000+0x1000000) Bus[0x0..0xF] Io[0x0+0x10000)@0x3EFF0000 Mem[0x10000000+0x2EFF0000)@0x0 In order to allow PCI enumeration to allocate IO and MMIO resources from the above ranges for devices, we must add the ranges to the Global Coherency Domain. There are two ways for that: - building resource descriptor HOBs in the HOB producer phase (basically, PEI), and letting the DXE core process them, - calling gDS->AddIoSpace() and gDS->AddMemorySpace() during DXE. We opt for the second method for simplicity. In the address space maps, the corresponding ranges change from "nonexistent" to "IO" and "MMIO", from which the gDS->AllocateIoSpace() and gDS->AllocateMemorySpace() services can later allocate PCI BARs. GCD:AddIoSpace(Base=0000000000000000,Length=0000000000010000) GcdIoType = I/O Status = Success GCDIoType Range ========== ================================= -> I/O 0000000000000000-000000000000FFFF GCD:AddMemorySpace(Base=0000000010000000,Length=000000002EFF0000) GcdMemoryType = MMIO Capabilities = 0000000000000001 Status = Success GCDMemType Range Capabilities Attributes ========== ================================= ================ ================ NonExist 0000000000000000-0000000003FFFFFF 0000000000000000 0000000000000000 MMIO 0000000004000000-0000000007FFFFFF C000000000000001 8000000000000001 NonExist 0000000008000000-000000000900FFFF 0000000000000000 0000000000000000 MMIO 0000000009010000-0000000009010FFF C000000000000001 8000000000000001 NonExist 0000000009011000-000000000FFFFFFF 0000000000000000 0000000000000000 -> MMIO 0000000010000000-000000003EFEFFFF C000000000000001 0000000000000000 NonExist 000000003EFF0000-000000003FFFFFFF 0000000000000000 0000000000000000 SystemMem 0000000040000000-00000000BFFFFFFF 800000000000000F 0000000000000008* NonExist 00000000C0000000-0000FFFFFFFFFFFF 0000000000000000 0000000000000000 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16903 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/ArmVirtualizationQemu: enable IO addressingLaszlo Ersek1-0/+6
Set gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize to 16, which determines the maximum "I/O address width". This ensures, through the BuildCpuHob() call in "ArmPkg/Drivers/CpuPei/CpuPei.c", that the inital I/O Space Map will consist of a 16-bit wide "splittable" entry, when the DXE core starts (see CoreInitializeGcdServices() in "MdeModulePkg/Core/Dxe/Gcd/Gcd.c"): GCD:Initial GCD I/O Space Map GCDIoType Range ========== ================================= NonExist 0000000000000000-000000000000FFFF Otherwise this range would have size 0, and (since it could not be split) any gDS->AddIoSpace() calls would fail. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16902 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: accommodate general address spacesLaszlo Ersek1-13/+22
The RootBridgeIoCheckParameter() function currently relies on the range limit being of the form (2^n - 1). This assumption is not necessarily true; handle the general case. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16901 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: IO space is emulated with MMIOLaszlo Ersek1-6/+6
There is no IO space on ARM, and there are no special instructions that access it. QEMU emulates the IO space for PCI devices with a special MMIO range. We're ready to use it at this point, we just have to switch the Io(Read|Write)(8|16|32) primitives to their MMIO counterparts, because in "MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c", the IO primitives correctly ASSERT (FALSE). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16900 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: translate addresses for IOLaszlo Ersek2-4/+17
Unlike the one in PcAtChipsetPkg, our PciHostBridgeDxe module must handle address space translation. IO addresses expressed in the respective aperture are mapped to a different base in CPU address space. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16899 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: abort if there's no PCI host bridgeLaszlo Ersek2-0/+7
If VirtFdtDxe found no PCI host in the DTB, then the config space base address will be left at zero -- the default is set in the DSC --, and we should exit PciHostBridgeDxe immediately. This causes gEfiPciRootBridgeIoProtocolGuid not to be installed, which in turn prevents MdeModulePkg/Bus/Pci/PciBusDxe from binding (see PciBusDriverBindingSupported()). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16898 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: set Root Bridge apertures from PCDsLaszlo Ersek3-3/+26
Our PciHostBridgeDxe module creates one root bridge on the one and only host bridge. The resource apertures of the root bridge (bus range, IO space, MMIO space) are configured with the "mResAperture" array, which at the moment carries static values inherited from PcAtChipsetPkg. Set the array as first thing from the PCDs that we parsed from the device tree. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16897 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: ECAM enables 4KB config spaceLaszlo Ersek1-1/+1
The Enhanced Configuration Access Mechanism provides access to 4096 register bytes per PCIe B/D/F. The MAX_PCI_REG_ADDRESS macro that we're changing here is used by RootBridgeIoCheckParameter() for verifying config space boundaries in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.Pci.Read() and .Write(). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.Martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16896 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/PciHostBridgeDxe: clone from PcAtChipsetPkgLaszlo Ersek4-0/+3870
MdeModulePkg/Bus/Pci/PciBusDxe depends on EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL and EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. Here we clone the driver that produces these from PcAtChipsetPkg, with the following immediate changes: - a new FILE_GUID is generated; - the assembly-language Ia32 / X64 specific IoFifo "accelerators" are not copied, and their client code (which would be dead code anyway) is removed; - UNI files are not copied: they are used in conjunction with the UEFI Packaging Tool (UPT), but the driver under ArmVirtualizationPkg will not be part of UDK. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16895 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmVirtualizationPkg/VirtFdtDxe: parse "pci-host-ecam-generic" propertiesLaszlo Ersek3-11/+208
In the Linux kernel tree, "Documentation/devicetree/bindings/pci/host-generic-pci.txt" describes the device tree bindings of a Generic PCI host controller. Recent QEMU patches from Alexander Graf implement such a controller on the "virt" machine type of qemu-system-(aarch64|arm): pcie@10000000 { // // (devfn<<8, 0, 0) PCI irq // ---------------- ------- interrupt-map-mask = <0x1800 0x0 0x0 0x7>; // gic irq // (devfn<<8, 0, 0) pin+1 phandle (type, nr, level) // ---------------- ----- -------- ----------------- interrupt-map = < 0x0 0x0 0x0 0x1 0x8001 0x0 0x3 0x4 0x0 0x0 0x0 0x2 0x8001 0x0 0x4 0x4 0x0 0x0 0x0 0x3 0x8001 0x0 0x5 0x4 0x0 0x0 0x0 0x4 0x8001 0x0 0x6 0x4 0x800 0x0 0x0 0x1 0x8001 0x0 0x4 0x4 0x800 0x0 0x0 0x2 0x8001 0x0 0x5 0x4 0x800 0x0 0x0 0x3 0x8001 0x0 0x6 0x4 0x800 0x0 0x0 0x4 0x8001 0x0 0x3 0x4 0x1000 0x0 0x0 0x1 0x8001 0x0 0x5 0x4 0x1000 0x0 0x0 0x2 0x8001 0x0 0x6 0x4 0x1000 0x0 0x0 0x3 0x8001 0x0 0x3 0x4 0x1000 0x0 0x0 0x4 0x8001 0x0 0x4 0x4 0x1800 0x0 0x0 0x1 0x8001 0x0 0x6 0x4 0x1800 0x0 0x0 0x2 0x8001 0x0 0x3 0x4 0x1800 0x0 0x0 0x3 0x8001 0x0 0x4 0x4 0x1800 0x0 0x0 0x4 0x8001 0x0 0x5 0x4>; #interrupt-cells = <0x1>; // // child base cpu base // type address address size // --------- -------------- -------------- -------------- ranges = <0x1000000 0x0 0x0 0x0 0x3eff0000 0x0 0x10000 0x2000000 0x0 0x10000000 0x0 0x10000000 0x0 0x2eff0000>; // // PCIe config PCIe config // space base space size // -------------- ------------- reg = <0x0 0x3f000000 0x0 0x1000000>; // // allowed bus numbers; inclusive range // bus-range = <0x0 0xf>; #size-cells = <0x2>; #address-cells = <0x3>; device_type = "pci"; compatible = "pci-host-ecam-generic"; }; Parse those properties of the compatible="pci-host-ecam-generic" node into PCDs that are relevant for PCI enumeration in edk2: - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress controls MdePkg/Library/BasePciExpressLib, - gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration controls OvmfPkg/AcpiPlatformDxe at this point, - the rest have been introduced earlier in this patchset, and will control PCI range checks and translation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16894 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23ArmPlatformPkg: introduce PCDs for describing PCI address spacesLaszlo Ersek1-0/+62
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16893 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-19ArmVirtualizationPkg: Set PcdPciDisableBusEnumeration to TRUEJordan Justen1-0/+4
This setting makes OvmfPkg/AcpiPlatformDxe not wait for PCI enumeration to complete before installing ACPI tables. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16886 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-17ArmPlatformPkg/ArmVExpress-FVP-AArch64.dsc: Fixed buildOlivier Martin1-6/+6
The FeaturePcd gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy was not defined in the correct section. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16881 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.1 at 2024-11-15 11:39:29 +0000