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2014-02-12ArmPkg/ArmLib: Added ArmReadMidr()Olivier Martin1-1/+6
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15240 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-02ArmPkg/ArmLib: Change comment to match code for setting of V bit in SCTLR ↵Roy Franz1-1/+1
register. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Roy Franz <roy.franz@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14616 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmLib: Added new functions to access ARM coprocessorsoliviermartin1-0/+6
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13253 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-26ArmLib/ArmV7: Add ISB to ArmEnableVFPoliviermartin1-0/+1
ArmEnableVFP could crash on an out-of-order CPU. Adding an instruction barrier after writing to CPACR cures the problem. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13134 6f19259b-4bc3-4df7-8a09-765794883524
2012-02-14ArmPkg/ArmV7Lib: Add support for Invalid Instruction Cache to Point of ↵oliviermartin1-0/+50
Unification This patch adds support to invalidate Instruction Cache to the Point of Unification (PoU). Signed-off-by: eugenecohen Reviewed-by: oliviermartin git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13012 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-27ArmPkg/ArmLib: Clean ArmV7Liboliviermartin1-357/+334
- Move the non specific ArmV7 functions to ArmLib. - Clean the ARM Platform common components to not depend on ArmV7 if not required git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12453 6f19259b-4bc3-4df7-8a09-765794883524
2011-06-03ArmPkg: Implement PeiServicesTablePointerLib using TPIDRURW registeroliviermartin1-0/+10
This implementation use the Tpidrurw software context register to store the PEI Services Table Pointer. The author of this patch is Eugene Cohen (HP). git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11750 6f19259b-4bc3-4df7-8a09-765794883524
2011-06-03ArmPkg: Add comments to ArmEnableVFPoliviermartin1-4/+7
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11740 6f19259b-4bc3-4df7-8a09-765794883524
2011-06-03ArmPkg: Introduce ArmSetLowVectors/ArmSetHighVectors functionsoliviermartin1-0/+21
These functions set/clear the SCTLR.V bit that controls the location of the Vector Table. This commit also forces the SCTLR.V to be clear when the VBAR register is set. Note: The original fix has been proposed by Eugene Cohen (HP). git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11739 6f19259b-4bc3-4df7-8a09-765794883524
2011-02-02Fix issue with fixing tabs.andrewfish1-6/+6
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11297 6f19259b-4bc3-4df7-8a09-765794883524
2011-02-02Remove tabs from all text files in the package.andrewfish1-6/+6
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11295 6f19259b-4bc3-4df7-8a09-765794883524
2011-02-02Sync up ArmPkg with patch from mailing list. Changed name of BdsLib.h to ↵andrewfish1-37/+130
BdsUnixLib.h and fixed a lot of issues with Xcode building. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11293 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-29Update the copyright notice formathhtian1-2/+2
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10444 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-13Make sure FIQ debugger stuff can work.andrewfish1-1/+1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10369 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-13Cleanup MMU code to do book required sync. Update exception handler to clear ↵andrewfish1-0/+1
fault registers. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10366 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-07Cleanup Cache an MMU operations.andrewfish1-16/+9
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10348 6f19259b-4bc3-4df7-8a09-765794883524
2010-03-03Syncing GCC and ARMASM assembly. Made chunks of the ARMASM lowercase to make ↵andrewfish1-102/+101
the diff easier. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10163 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-24Updated Hardware Interrupt protocol to add an EOI member. Added ARM ↵andrewfish1-0/+17
Data/Instruction syncronization barrier support to the ARM lib. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10063 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-19Clean up some externsandrewfish1-0/+1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10028 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-19Sync gcc with armasm. update some memory barriers.andrewfish1-46/+50
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10025 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-18Hack in some DSB, ISB syncronization primatives. Need to do it a little cleaner.andrewfish1-0/+68
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10023 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-18Change Cortex-A8 references to ARMv7. Cortex-A8 is a branded implementation ↵andrewfish1-0/+147
of the ARMv7 processor architecture. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10022 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.1 at 2024-07-16 21:34:41 +0000