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2014-02-05ArmPkg/ArmLib: VBAR_ELx not written correctly when handler above 4GBOlivier Martin1-3/+3
The function ArmWriteVBar had a UINT32 parameter. Need to change it to UINT. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15208 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-10ArmPkg/ArmPkg.dec: Redefined PcdSystemMemory(Base|Size) as UINT64Olivier Martin1-1/+1
The System Memory region might be out of the 32-bit memory space. This change has been validated on the FVP AArch64 model using 4GB of DRAM at 0x8_0000_0000: - # System Memory (2GB) - gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 - gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000 + # System Memory (4GB) + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x800000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000 EFI Shell and Linux kernel boot successfully. Note: This change has not been validated on AArch32. I expect some early assembly code to not work. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15093 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-10ArmPkg/AArch64Mmu.h: Fix 'Shift is >= width of type'Olivier Martin1-6/+6
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14956 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-10ArmPkg/ArmMpCoreInfo.h: Fixed macro definitionOlivier Martin1-1/+1
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14954 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28ArmPkg: Move definition of ArmIsArchTimerImplemented / ArmReadIdPfrN to ArmLibOlivier Martin3-31/+19
These functions are not chipset specific. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14908 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-29ARM Packages: Renamed PL390Gic driver into ArmGic driverOlivier Martin1-2/+2
The aim is to make this driver follows the ARM GIC specifications and be implementation independent. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14810 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-15ArmPkg/Include/Chipset: Fix translation table address calculations for AARCH64Garrett Kirkendall1-3/+3
TT_ADDRESS_* macros were not casting immediate values to UINTN. This causes shift operations to be off by 32-bits when calculating addresses above 4GB. Any address above 4GB was being improperly calculated. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14777 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-21ArmPkg/ArmGicLib.h: Added macro to retrieve the information from the ICCIDROlivier Martin1-8/+13
These macros are helper functions to get the information from the GIC CPU Interface Identification register. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14582 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-19ArmPkg/ArmLib: Added ConvertSectionAttributesToPageAttributes()Olivier Martin1-0/+6
This helper function converts the section attributes into their page equivalents. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14567 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-19ArmPkg/ArmV7Mmu.h: Added masks to extract attributes from Section and Page ↵Olivier Martin1-1/+8
entries Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14566 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-19ArmPkg/ArmLib: Introduced TT_LAST_BLOCK_ADDRESS()Olivier Martin1-0/+3
This macro return the address of the last entry of a translation table. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14565 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-06ArmPkg/ArmV7Mmu.h: Fixed XN bit conversion from section to small/large page ↵Olivier Martin1-2/+2
format Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14523 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-06ARM: Remove NSACR from the common codeOlivier Martin3-22/+18
NSACR (Non-Secure Access Control Register) is AArch32 specific. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14522 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-18ArmPkg: Added Aarch64 supportHarry Liebel9-13/+652
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14486 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-27ArmPkg: Made ArmConfigureMmu() returns a status codeOlivier Martin1-2/+2
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14445 6f19259b-4bc3-4df7-8a09-765794883524
2013-05-12ArmPkg/BdsLinuxFdt.c: Fix creation of 'cpu' and 'psci' device tree nodes.oliviermartin1-0/+1
* Fix name of 'device_type' and 'migrate' properties. * Fix 'reg' property. It is supposed to contain the CPU MPIDR of the CPU being described. * Fix byte ordering of data in 'psci' node. * Fix some problems regarding the size of data. In a number of places it was assumed data would be 32-bits wide. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14351 6f19259b-4bc3-4df7-8a09-765794883524
2013-05-10ARM Packages: Replaced the macro GetCorePositionFromMpId() by the ↵oliviermartin2-33/+0
ArmPlatformGetCorePosition() Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14346 6f19259b-4bc3-4df7-8a09-765794883524
2013-05-10ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()oliviermartin3-8/+19
Checking if a core if the primary/boot core used to be done with the macro IS_PRIMARY_CORE(). Some platforms exposes configuration registers to change the primary core. Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows some flexibility in the way to check the primary core. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Ryan Harkin <ryan.harkin@linaro.org> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524
2013-04-14ArmPkg/BdsLib: Replace ARM magic value by a proper defined value.oliviermartin1-0/+2
"ARMH" is the Four-Letter unique identifier used by ARM in the context of the fast SMC identification interface. This patch properly defines this value in a header file instead of using the numeric value directly in the code. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14268 6f19259b-4bc3-4df7-8a09-765794883524
2013-03-12ArmPkg/ArmLib: Functions to access ARM HYP Vector base address register.oliviermartin1-0/+12
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14189 6f19259b-4bc3-4df7-8a09-765794883524
2013-03-12ArmPkg/IndustryStandard: Added definition for some SMC IDsoliviermartin2-0/+211
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14184 6f19259b-4bc3-4df7-8a09-765794883524
2013-03-12ArmPkg: Fixed unsigned type to be architecture independentoliviermartin1-10/+11
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14181 6f19259b-4bc3-4df7-8a09-765794883524
2013-03-12ArmPkg: Introduce GetGlobalEnvironmentVariable() function.oliviermartin1-8/+17
Rename GetEnvironmentVariable() function into GetGlobalEnvironmentVariable(). GetEnvironmentVariable() function sill exists but caller must now pass a Guid. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14176 6f19259b-4bc3-4df7-8a09-765794883524
2013-03-06ArmPkg: Move ArmSmcLib from ArmPlatformLib to ArmPkgoliviermartin1-0/+44
A ArmSmcLib Null implementation has also been added for CPU without the ARM Security Extension (Trustzone support). Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14164 6f19259b-4bc3-4df7-8a09-765794883524
2013-01-25ArmPkg/ArmV7.h: Introduced ARM_ARCH_EXCEPTION_IRQoliviermartin1-0/+3
This constant allows to reduce architecture difference in the position of the IRQ in the exception table. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14099 6f19259b-4bc3-4df7-8a09-765794883524
2013-01-25ArmPlatformPkg/PrePi: Removed magic valuesoliviermartin1-1/+16
Introduced CPSR (Coprocessor Status Register) definitions Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14097 6f19259b-4bc3-4df7-8a09-765794883524
2013-01-25ArmPkg: Move Arm(Enable|Disable)Irq() functions from internal header to ↵oliviermartin1-1/+13
library header file Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14091 6f19259b-4bc3-4df7-8a09-765794883524
2013-01-25ARM Packages: Fixed line endingsoliviermartin7-1541/+1541
This large code change only modifies the line endings to be CRLF to be compliant with the EDK2 coding convention document. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14088 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-28ArmPlatformPkg/ArmPlatformStackLib: Introduced helper library to initialize ↵oliviermartin2-1/+52
stacks The new functions are: - ArmPlatformStackSet(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize); - ArmPlatformStackSetPrimary(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize); - ArmPlatformStackSetSecondary(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize); The stack topology can be changed by implementing a new ArmPlatformStackLib Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13774 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-26ArmPkg/include: Added macro ARM_VECTOR_TABLE_ALIGNMENToliviermartin1-0/+2
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13744 6f19259b-4bc3-4df7-8a09-765794883524
2012-07-04ArmPkg/AsmMacroIoLib: Renamed 'GetCorePositionInStack' macro into ↵oliviermartin2-4/+4
'GetCorePositionFromMpId' Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13493 6f19259b-4bc3-4df7-8a09-765794883524
2012-07-04ArmPkg: Fixed RVCT compiler warningsoliviermartin1-6/+6
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13490 6f19259b-4bc3-4df7-8a09-765794883524
2012-07-04ArmPkg/PL390Gic: Added support for ArmGicDisableInterruptInterface()oliviermartin1-0/+6
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13489 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmCpuLib: Fixed SMP Cortex-A9 and Cortex-A15oliviermartin1-0/+25
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13261 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmGicLib: Replaced 'ArmGicAcknowledgeSgiFrom' by ↵oliviermartin1-12/+6
'ArmGicAcknowledgeInterrupt' The function 'ArmGicAcknowledgeSgiFrom' was actually acknowledging Interrupts (and not only SGIs). ArmPkg/ArmGicLib: Introduced the PCD PcdGicPrimaryCoreId This PCD defines the Id of the primary core in the GIC. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13259 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmGicLib: Changed ArmGicSendSgiTo() to allow to send a specific SGIoliviermartin1-1/+2
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13258 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmLib: Added ARM Cpu IDsoliviermartin1-0/+19
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13257 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmLib: Fixed MpCore macrosoliviermartin1-4/+10
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13256 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmLib: Added new functions to access ARM coprocessorsoliviermartin1-2/+40
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13253 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ARM Packages: Fixed th 'NS' (Non Secure) bit in the MMU page Table Descriptoroliviermartin3-58/+64
The 'NS' bit must only be set in Secure world to define the Non-Secure region of the Non-Secure World. This bit must not be set in Non-Secure World. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13252 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmCpuLib: Replaced complex functions ArmCpuSynchronizeWait & ↵oliviermartin2-19/+11
ArmCpuSynchronizeSignal by sev & wfe Previsouly the synchronization of MpCore was using the SGI (Software Generated Interrupt) to synchronize MpCore during the early boot. This commit replaced this mechanism by the more appropriate SEV/WFE instructions (Send/Wait Event instructions). That also eases the port to a new cpu/platform. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13249 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg: Replaced gArmTokenSpaceGuid.PcdGicNumInterrupts by ↵oliviermartin1-0/+6
ArmGicGetMaxNumInterrupts() The maximum number of interrupts can be retrieve through the GIC distributor. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13244 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-26ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure ↵oliviermartin1-1/+2
bits to their PPIs The GICD_IGROUPR0 is banked for each connected processor. It means the Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be configured for every processor. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-26ArmPkg/ArmLib: Added ARM_PROCESSOR_MODE_HYP to ARM_PROCESSOR_MODEoliviermartin1-0/+1
ARM_PROCESSOR_MODE_HYP stands for the Hypervisor mode. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13130 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-26ArmPkg/ArmLib.h: Fixed the ClusterId and CoreId masksoliviermartin1-4/+4
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13124 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-26ArmPkg/ArmGicLib: Added function ArmGicSetSecureInterrupts() to define the ↵oliviermartin1-1/+9
secure interrupts git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13122 6f19259b-4bc3-4df7-8a09-765794883524
2012-02-29ArmPkg/ArmLib: Replaced 'UINTN' type by architecture agnostic types ↵oliviermartin1-2/+4
(EFI_PHYSICAL_ADDRESS & EFI_VIRTUAL_ADDRESS) to describe memory addresses git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13073 6f19259b-4bc3-4df7-8a09-765794883524
2012-02-28ArmPkg/Library/SemihostLib: Removed depenencies on Uefi.h (Base library)oliviermartin1-7/+7
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13065 6f19259b-4bc3-4df7-8a09-765794883524
2012-02-28ArmPlatformPkg: Updated the stack setup to have the same geometry between ↵oliviermartin2-2/+35
the Secure and Normal World Having a similar setup reduces the error during the MPCore stack setup. The stack setup is described on this wikipage: https://sourceforge.net/apps/mediawiki/tianocore/index.php?title=ArmPlatformPkg/Stack git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13058 6f19259b-4bc3-4df7-8a09-765794883524
2012-02-28ArmPkg/ArmLib.h: Update 'ARM_MEMORY_REGION_DESCRIPTOR' to support 64bit ↵oliviermartin1-3/+3
addresses Replaced 'UINT32' by 'UINTN'. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13055 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.1 at 2024-10-09 04:52:05 +0000