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Capture TransferList address from register x3
Refer to section 3 of the FW Handoff Specification
https://firmwarehandoff.github.io/firmware_handoff
The TransferList header is present at the base address
captured by this variable.
For platforms with no TransferList support,
boot continues without any errors.
Signed-off-by: Prachotan Bathi <prachotan.bathi@arm.com>
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ArmTransferListHobGuid holds TransferList base address
If there's no valid TransferList found, Guid HOB is not built,
boot progresses as usual.
Signed-off-by: Prachotan Bathi <prachotan.bathi@arm.com>
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ArmTransferListHobGuid will hold the TransferList base address
https://firmwarehandoff.github.io/firmware_handoff
Signed-off-by: Prachotan Reddy Bathi <Prachotan.Bathi@arm.com>
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Capture TransferList address from register x3
Refer to section 3 of the FW Handoff Specification
https://firmwarehandoff.github.io/firmware_handoff
The TransferList header is present at the base address
captured by this variable.
For platforms with no TransferList support,
boot continues without any errors.
Signed-off-by: Prachotan Reddy Bathi <Prachotan.Bathi@arm.com>
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Added functionality TransferList Library
TransferListVerifyChecksum - Verify TransferList CheckSum
TransferListCheckHeader - Check if TransferList header is valid,
return suitable opcodes validating the header
TransferListFindEntry - Find a specific entry on the TransferList
using the TagId
TransferListDump - Dump the contents of the TransferList header
and the entry headers
Signed-off-by: Prachotan Reddy Bathi <Prachotan.Bathi@arm.com>
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To support TPM2 devices that operate over the FF-A specification using CRB
in the Tcg2Pei PEIM, add the Tcg2ConfigFfaPei PEIM to
detect the presence of such TPM2 devices.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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To support measurement and extend PCR in PeilessSec with
TPM device using FF-A over CRB, add Tpm2DeviceSecLibFfa for PeilessSec.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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This is preparation patch to add Tpm2DeviceSecLibFfa for SEC
used in PeilessSec.
In SEC phase, DynamicPcd used for cacahing TPM2 information
couldn't be used.
To resolve this, writes wrapper functions to get TPM2 information
so that in the wrapper functions used in SEC wouldn't use the
related DyanmicPcd.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Makes changes to comply with alerts raised by CodeQL.
Most of the issues here fall into the following two categories:
1. Potential use of uninitialized pointer.
2. Inconsistent integer width in comparison.
Co-authored-by: Taylor Beebe <31827475+TaylorBeebe@users.noreply.github.com>
Co-authored-by: kenlautner <85201046+kenlautner@users.noreply.github.com>
Co-authored-by: Bret Barkelew <bret@corthon.com>
Signed-off-by: Doug Flick <dougflick@microsoft.com>
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When DEBUG_SECURITY was added, not all prints in
Tpm2DeviceLibDTpmDump.c were updated. This commit updates
the remaining prints.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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The various cores all attempt to print the EfiFileName when
loading/dispatching drivers, but they are not unified on
approach. This commit ensures they are using the same buffer
size and the loop parsing variables are unsigned, as we should
not have a negative index.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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The various cores all attempt to print the EfiFileName when
loading/dispatching drivers, but they are not unified on
approach. This commit ensures they are using the same buffer
size and the loop parsing variables are unsigned, as we should
not have a negative index.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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Today, StandaloneMM Core's image loader only prints driver load messages
if debug code is enabled. However, these are some of the most
important prints in the codebase: on a given system even if you
have nothing else to debug with, you can see the last driver
executed.
Debug code blocks are used to skip logic that only exists for
debug purposes and wastes time on a release build. However, the
logic to print a line and determine the filename from the PDB
is not extensive and provides critical information, so it is
inappropriate to wrap in a debug code section.
Platforms can still choose to disable logging at DEBUG_INFO/DEBUG_LOAD
and will not see the error messages.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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Today, DXE/PEI/SMM Core's image loaders only print driver load messages
if debug code is enabled. However, these are some of the most
important prints in the codebase: on a given system even if you
have nothing else to debug with, you can see the last driver
executed.
Debug code blocks are used to skip logic that only exists for
debug purposes and wastes time on a release build. However, the
logic to print a line and determine the filename from the PDB
is not extensive and provides critical information, so it is
inappropriate to wrap in a debug code section.
Platforms can still choose to disable logging at DEBUG_INFO/DEBUG_LOAD
and will not see the error messages.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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Map the feature control MSR config from the OVMF platform info HOB to
FIRST_SMI_HANDLER_CONTEXT.
(Note that CpuHotplugSmm already consumes -- indirectly -- the
"MdePkg/Library/DxeHobLib/DxeHobLib.inf" library instance, according to
the build report; therefore adding an explicit HobLib class dependency
shouldn't *generally* increase this SMM driver's exposure. The consumed
lib instances are the same before and after this patch, at least in
"OvmfPkgIa32X64.dsc".)
Fixes: https://github.com/tianocore/edk2/issues/11188
Signed-off-by: Laszlo Ersek <laszlo.ersek@posteo.net>
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Introduce new fields to FIRST_SMI_HANDLER_CONTEXT:
- a UINT8 (effectively: boolean) value that controls whether the first SMI
handler of the hot-added CPU is supposed to set
MSR_IA32_FEATURE_CONTROL,
- and for when that is the case, two UINT32 values, for passing the
desired EDX:EAX (64-bit) MSR value.
MSR_IA32_FEATURE_CONTROL might as well be settable in the post-SMM pen
("PostSmmPen.nasm"); however, I find the first SMI handler better for this
purpose:
- we already have a nice context structure we can extend,
- in SMM, we have tighter control than after SMM (see the comments near
the top of "PostSmmPen.nasm").
MSR_IA32_FEATURE_CONTROL is orthogonal to the SMRAM State Save Map, and
WRMSR is permitted in the real mode-like initial environment of SMM, so
functionally speaking, this should be fine.
For now, the feature is disabled.
Signed-off-by: Laszlo Ersek <laszlo.ersek@posteo.net>
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In a subsequent patch, we'll introduce fields with long names to
"FIRST_SMI_HANDLER_CONTEXT". Make room for those field names in
"FirstSmiHandler.nasm".
"git show -b" produces no patch output for this commit.
Signed-off-by: Laszlo Ersek <laszlo.ersek@posteo.net>
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A zero "FeatureControlValue" currently means "no feature control, or
feature control with zero value". Distinguish both cases by explicitly
recording the presence of the "etc/msr_feature_control" fw_cfg file. This
will be helpful later in this series, when we won't want to touch fw_cfg
again, but still know if "etc/msr_feature_control" was read OK.
Signed-off-by: Laszlo Ersek <laszlo.ersek@posteo.net>
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When FvSimpleFileSystem is included in a firmware image,
the FV is accessible as a simple file system.
Shell contained a bad assumption that the FileDevicepath,
the path where the efi shell was loaded from, was always
a Media device path/media vendor device path. It would
make a blind cast of the device path node.
Add a check to verify device path type/subtype before
casting the node to a FILEPATH_DEVICE_PATH.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
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Utilize the updated CpuExceptionHandlerLib, which now includes
RISC-V support.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
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Add support for backtrace in DEBUG builds for RISC-V.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
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Add -fno-omit-frame-pointer to RISC-V targets to ensure frame pointers
are preserved, supporting stack backtraces for debugging.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
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Scrub s0 (fp) to prevent stack tracing from extending beyond the Sec code.
Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
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Relocate exception handler code from BaseRiscV64CpuExceptionHandlerLib to
CpuExceptionHandlerLib.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
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In HardwareInterrupt2.h the define for the protocol does not match the definition
of the protocol in the dec file. The definition in the dec file is 32898322-2da1-474a-baaa-f3f7cf569470
where in the definition the define is 32898322-2d1a-474a-baaa-f3f7cf569470 and the string
is even less correct with various bit swaps.
This commit changes all the strings and definitions to be consistent with the dec definition.
Signed-off-by: Chris Fernald <chfernal@microsoft.com>
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Commit a257988f590ba90dd8394dd6bc7014ae9d814a08 added -Wl,-z,notext, but
only when linking for IA32/X64 with LLD.
BFD can also be configured to either warn or error when text relocations
are detected. It does not check at all by default, but Gentoo Linux
tells it to warn in its regular configuration and tells it to error in
its hardened configuration.
Commit 14cb48b0a053b44c5a6bcc89cbbbf86ac78c7820 made linker warnings
fatal in all BFD cases. At least the AARCH64 and IA32/X64 code does
include text relocations, so this now fails to build on Gentoo Linux.
We should therefore always use -Wl,-z,notext.
Signed-off-by: James Le Cuirot <jlecuirot@microsoft.com>
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For consistency, and as before, for GCC5 only.
Signed-off-by: James Le Cuirot <jlecuirot@microsoft.com>
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These haven't been used since before 2d07607d8b1a0710ba7379f8ee6c11dae1,
when UNIXGCC support was dropped.
The recent change in 14cb48b0a053b44c5a6bcc89cbbbf86ac78c7820 to make
linker warnings fatal was therefore ineffective for these architectures.
As requested, also make linker warnings fatal for GCC5 only. The last
release made them fatal for AARCH64 on GCC48/GCC49, but it seems likely
no one has actually tested that yet.
Signed-off-by: James Le Cuirot <jlecuirot@microsoft.com>
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Add an explicit (UINT32) cast to the assignment.
Signed-off-by: Pranav V V <pranav.v.v@intel.com>
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Convert UART configuration PCDs from FixedPcd to dynamic Pcd to enable
runtime modification of serial port parameters.
Changes made:
- Replace FixedPcdGet64/FixedPcdGet8 calls with PcdGet64/PcdGet8 for:
* PcdUartDefaultBaudRate
* PcdUartDefaultParity
* PcdUartDefaultDataBits
* PcdUartDefaultStopBits
- Update INF file to declare these PCDs under [Pcd].
Signed-off-by: Pranav V V <pranav.v.v@intel.com>
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Introduce an X64-specific implementation of the
SsdtSerialPortFixupLib library class.
Utilizes the AML library to generate COM or serial device dynamically.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Adds AML code generation for Serial UART resource descriptor.
This commit introduces helper functions to generate
AML resource data for serial UART resource descriptor.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Adds AML code generation for IRQ resource descriptor.
This commit introduces helper functions to generate
AML resource data for IRQ resource descriptors.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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The Serial Bus UART structure was introduced in ACPI 5.0.
This patch defines a revision macro for this structure and
also adds type specific flag macros.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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According to the recently released ACPI 6.6 specification, the minor
version of the Fixed ACPI Description Table (FADT) should be updated to
revision 6, and the Multiple APIC Description Table (MADT) should use
revision 7. Update the macros to reflect this.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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ACPI 6.6 defines new affinity structure for RISC-V Intc. Add their
definitions.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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ACPI 6.6 introduced new MADT structures for RISC-V and a new static
table RHCT. Add the definitions for these new structures.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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The FillExchangeInfoDataSevEs() is only called for SEV-SNP guests, but
the name (and comment in MpLib.c) implies that it is also called for
SEV-ES guests. Rename the function to FillExchangeInfoDataSevSnp() to
avoid confusion.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
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The SevSnpKnownInitApicId field within the MP_CPU_EXCHANGE_INFO structure
is not guaranteed to be zero when booting an SEV-ES guest. While the check
in SevSnpGetInitCpuNumber() is conditionally guarded by verifying if the
guest is an SEV-SNP guest, the check in SevEsGetApicId() is not similarly
guarded.
This lack of protection can cause SevEsGetApicId() to return to the wrong
location. If the value of the SevSnpKnownInitApicId field contains the
exact random value of 1, the guest will be treated as an SEV-SNP guest
rather than an SEV-ES guest and return to the wrong location in the code
which will lead to a crash.
Ensure that all SEV related fields in MP_CPU_EXCHANGE_INFO structure are
properly initialized, thus removing the need for guarding access to the
SevSnpKnownInitApicId field.
Fixes: dca5d26bc57e ("UefiCpuPkg/MpInitLib: Fix SNP AP creation when using known APIC IDs")
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
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The Event3 memory comparison is technically correct since the
definitions of the struct types are the same. The extended
bodies of the events are different. The Event2 size guard
for the Event3 comparison should be split to use the Event3
in its sizeof for better clarity.
The large single condition makes the function difficult to
understand, so the combined logic is split into different
conditional statements.
Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
[ardb: whitespace fixes]
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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The Event3 memory comparison is technically correct since the
definitions of the struct types are the same. The extended
bodies of the events are different. The Event2 size guard
for the Event3 comparison should be split to use the Event3
in its sizeof for better clarity.
The large single condition makes the function difficult to
understand, so the combined logic is split into different
conditional statements.
Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
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Refine debug log in SmmWaitForApArrival, and print the disabled count
info.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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Update AllApArrivedWithException if the 1st timeout sync is skipped
but all APs have arrived.
Example:
If IsCpuSyncAlwaysNeeded() returns false, LMCE is enabled and
triggered, and another SMI source combined with LMCE causes all APs
to enter SMI. Then 2nd timeout sync will be also skipped, but all APs
have arrived, so AllApArrivedWithException should be updated before
using.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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Bootloader does not expect FSP modifies GDTR and segment selectors, update
FSP entry/exit code to preserve these registers.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
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Running Codeql on MdeModulePkg/Universal/Console drivers results
in codeql errors stemming for the following checks.
- cpp/comparison-with-wider-type
- cpp/missing-null-test
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
Co-authored-by: Michael Kubacki <michael.kubacki@microsoft.com>
Co-authored-by: Taylor Beebe <tabeebe@microsoft.com>
Co-authored-by: pohanch <125842322+pohanch@users.noreply.github.com>
Co-authored-by: kenlautner <85201046+kenlautner@users.noreply.github.com>
Co-authored-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Co-authored-by: Sean Brogan <sean.brogan@microsoft.com>
Co-authored-by: Aaron <aaronpop@microsoft>
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Reduce library size by turning off:
* quic protocol support.
* post-quantum chipers.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Needed to build with openssl-3.5.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Avoids openssl-3.5 trying to figure automatically with some macro
magic, which happens to not work with the microsoft compiler.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Needed by openssl-3.5.1.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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New function in openssl 3.5 in a file edk2 replaces with stubs.
Add a stub for the new function.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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