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2020-08-03MdeModulePkg/BdsDxe: Fix spelling mistakeMichael D Kinney1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2355 Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2020-08-03MdeModulePkg/EbcDxe: Fix spelling mistakeMichael D Kinney1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2360 Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-08-03BaseTools/GenSec: Fix spelling mistakeMichael D Kinney1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2345 Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-08-03UefiCpuPkg/CpuCommonFeaturesLib: Fix spelling mistakeMichael D Kinney1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2357 Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-08-03EmbeddedPkg/TimeBaseLib: Add macros to get build year/month/dayPete Batard1-0/+32
These can be used, for instance, to automate the population of an SMBIOS Type 0 BIOS Release Date when building a UEFI firmware (which is how we plan to use these macros for the Raspberry Pi platform). These macros should work for any compiler that follows ISO/IEC 9899, but we add a check for the compiler we have tested to be on the safe side. Note that we decided against adding a #error or #warn for compilers that haven't been validated, as we don't want to introduce breakage for people who may already be using the header with something else than gcc, MSVC or Clang. Instead, we expect those to send a patch that adds their compiler to the list, once they have tested the macros there. Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-08-01OvmfPkg: fix DEC spec violation introduced by Bhyve additionLaszlo Ersek14-179/+14
Sean reports that having two DEC files under OvmfPkg violates the DEC spec: > An EDK II Package (directory) is a directory that contains an EDK II > package declaration (DEC) file. Only one DEC file is permitted per > directory. EDK II Packages cannot be nested within other EDK II > Packages. This issue originates from commit 656419f922c0 ("Add BhyvePkg, to support the bhyve hypervisor", 2020-07-31). Remedy the problem as follows. (Note that these steps are not split to multiple patches in order to keep Bhyve buildable across the transition.) (1) Delete "OvmfPkg/Bhyve/BhyvePkg.dec". (2) Point the [Packages] sections of the Bhyve-specific AcpiPlatformDxe, BhyveRfbDxe, and BhyveFwCtlLib INF files to "OvmfPkg.dec". (3) Migrate the artifacts that "BhyvePkg.dec" used to have on top of "OvmfPkg.dec" as follows: (3a) Merge the copyright notices from Rebecca Cran and Pluribus Networks into "OvmfPkg.dec". (3b) Merge the "BhyveFwCtlLib" class header definition into "OvmfPkg.dec". (3c) Merge value 0x2F8 for the fixed PcdDebugIoPort into "BhyvePkgX64.dsc". (4) Unnest the the Include/Library/ and Library/ subtrees from under OvmfPkg/Bhyve to the corresponding, preexistent subtrees in OvmfPkg. The goal is to keep the [Includes] section in the "OvmfPkg.dec" file unchanged, plus simplify references in "BhyvePkgX64.dsc". Non-library modules remain under "OvmfPkg/Bhyve/". (4a) The BhyveFwCtlLib class header, and sole instance, are already uniquely named, so their movements need not involve file renames. (4b) Rename the Bhyve-specific PlatformBootManagerLib instance to PlatformBootManagerLibBhyve, in additon to moving it, for distinguishing it from OvmfPkg's preexistent lib instance. Apply the name change to all three of the lib instance directory name, the INF file, and the BASE_NAME define in the INF file. (4c) Update lib class resolutions in "BhyvePkgX64.dsc" accordingly. (5) Replace the "ACPI table storage" FILE_GUID in "OvmfPkg/Bhyve/AcpiTables/AcpiTables.inf" with a new GUID, and open-code the "ACPI table storage" GUID in the "ACPITABLE" FDF rule instead, replacing $(NAMED_GUID). This step is necessary because CI requires unique FILE_GUIDs over all INF files, and OVMF's original "AcpiTables.inf" already uses the "ACPI table storage" GUID as FILE_GUID. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Rebecca Cran <rebecca@bsdio.com> Cc: Sean Brogan <spbrogan@outlook.com> Fixes: 656419f922c047a3c48bd3f4ecea7d8e87d0b761 Reported-by: Sean Brogan <spbrogan@outlook.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200801155024.16439-1-lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2020-07-31UefiCpuPkg/PiSmmCpuDxeSmm: pause in WaitForSemaphore() before re-fetchLaszlo Ersek1-7/+11
Most busy waits (spinlocks) in "UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c" already call CpuPause() in their loop bodies; see SmmWaitForApArrival(), APHandler(), and SmiRendezvous(). However, the "main wait" within APHandler(): > // > // Wait for something to happen > // > WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run); doesn't do so, as WaitForSemaphore() keeps trying to acquire the semaphore without pausing. The performance impact is especially notable in QEMU/KVM + OVMF virtualization with CPU overcommit (that is, when the guest has significantly more VCPUs than the host has physical CPUs). The guest BSP is working heavily in: BSPHandler() [MpService.c] PerformRemainingTasks() [PiSmmCpuDxeSmm.c] SetUefiMemMapAttributes() [SmmCpuMemoryManagement.c] while the many guest APs are spinning in the "Wait for something to happen" semaphore acquisition, in APHandler(). The guest APs are generating useless memory traffic and saturating host CPUs, hindering the guest BSP's progress in SetUefiMemMapAttributes(). Rework the loop in WaitForSemaphore(): call CpuPause() in every iteration after the first check fails. Due to Pause Loop Exiting (known as Pause Filter on AMD), the host scheduler can favor the guest BSP over the guest APs. Running a 16 GB RAM + 512 VCPU guest on a 448 PCPU host, this patch reduces OVMF boot time (counted until reaching grub) from 20-30 minutes to less than 4 minutes. The patch should benefit physical machines as well -- according to the Intel SDM, PAUSE "Improves the performance of spin-wait loops". Adding PAUSE to the generic WaitForSemaphore() function is considered a general improvement. Cc: Eric Dong <eric.dong@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Ray Ni <ray.ni@intel.com> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1861718 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200729185217.10084-1-lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-07-31Add BhyvePkg, to support the bhyve hypervisorRebecca Cran53-0/+12283
BhyvePkg supports the bhyve hypervisor, which is a hypervisor/virtual machine manager available on FreeBSD, macOS and Illumos. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Message-Id: <20200713054131.479627-2-rebecca@bsdio.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-07-31Revert "BaseTools/PatchCheck.py: Add LicenseCheck"Leif Lindholm1-50/+0
This reverts commit a4cfb842fca9693a330cb5435284c1ee8bfbbace. This commit suggests inclusion of non-edk2+license content without a contribution agreement is something the community has made a decision on, which is incorrect. Cc: Shenglei Zhang <shenglei.zhang@intel.com> Cc: Yuwei Chen <yuwei.chen@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-31UnitTestFrameworkPkg: Add configuration for LicenseCheck in yaml fileShenglei Zhang1-0/+4
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-07-31UefiCpuPkg/UefiCpuPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+3
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-07-31ShellPkg/ShellPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+3
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Ray Ni <ray.ni@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2020-07-31SecurityPkg/SecurityPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+3
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2020-07-31PcAtChipsetPkg/PcAtChipsetPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+3
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-31OvmfPkg/OvmfPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+4
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-07-31NetworkPkg/NetworkPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+3
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2020-07-31MdePkg/MdePkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+4
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-31MdeModulePkg/MdeModulePkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+4
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-07-31FmpDevicePkg/FmpDevicePkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+3
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-07-31EmulatorPkg/EmulatorPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+4
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-31CryptoPkg/CryptoPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+3
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com>
2020-07-31ArmVirtPkg/ArmVirtPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+4
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-07-31FatPkg/FatPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang1-0/+3
Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-31.pytool/Plugin: Add a plugin LicenseCheckShenglei Zhang3-0/+143
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2691 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2833 Add a plugin to check license conflict for new added files in a patch. It will report out errors when meeting files which are not contributed under BSD-2-Clause-Patent. Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-29BaseTools/PeCoffLoaderEx: Remove the unused local variableAbner Chang1-3/+0
BZ:2864 GCC build fails due to variable self assignment. This local variable is not used at any where, we can just remove it. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28MdePkg/Library/UnitTestHostBaseLib: Add missing servicesMichael D Kinney1-0/+34
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2862 Add ReadMmx()/WriteMmx() services Add MemoryFence() service Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28SecurityPkg/Tcg2Config: remove TPM2_ChangEPS if it is not supported.Qi Zhang3-0/+10
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2793 In current implementation TPM2_ChangeEPS command is always available in the TPM2 operation pull down list in TCG2 Configuration, which is confusing when the command is not supported by specific TPM chip. As a user experience improvement, TPM2_ChangeEPS command should be removed from the list when it is not supported. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2020-07-28SecurityPkg/Tpm2CommandLib: add a new functionZhang, Qi2-0/+56
Tpm2GetCapabilityIsCommandImplemented REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2793 check if the commad is supported by comparing the command code with command index. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2020-07-28SecurityPkg/TcgPei: Use Migrated FV Info Hob for calculating hash ↵Guomin Jiang2-2/+28
(CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 When we allocate pool to save rebased the PEIMs, the address will change randomly, therefore the hash will change and result PCR0 change as well. To avoid this, we save the raw PEIMs and use it to calculate hash. The TcgPei calculate the hash and it use the Migrated FV Info. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28UefiCpuPkg: Correct some typos.Guomin Jiang6-10/+10
Correct some typos. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28UefiCpuPkg/CpuMpPei: Enable paging and set NP flag to avoid TOCTOU ↵Guomin Jiang2-5/+30
(CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 To avoid the TOCTOU, enable paging and set Not Present flag so when access any code in the flash range, it will trigger #PF exception. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28SecurityPkg/Tcg2Pei: Use Migrated FV Info Hob for calculating hash ↵Guomin Jiang2-3/+29
(CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 When we allocate pool to save rebased the PEIMs, the address will change randomly, therefore the hash will change and result PCR0 change as well. To avoid this, we save the raw PEIMs and use it to calculate hash. The Tcg2Pei calculate the hash and it use the Migrated FV Info. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28MdeModulePkg/Core: Create Migrated FV Info Hob for calculating hash ↵Guomin Jiang5-0/+55
(CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 When we allocate pool to save the rebased PEIMs, the address will change randomly, therefore the hash will change and result PCR0 change as well. To avoid this, we save the raw PEIMs and use it to calculate hash. The MigratedFvInfo HOB will never produce when PcdMigrateTemporaryRamFirmwareVolumes is FALSE, because the PCD control the total feature. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Harry Han <harry.han@intel.com> Cc: Catharine West <catharine.west@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28UefiCpuPkg/SecMigrationPei: Add initial PEIM (CVE-2019-11098)Michael Kubacki10-2/+709
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 Adds a PEIM that republishes structures produced in SEC. This is done because SEC modules may not be shadowed in some platforms due to space constraints or special alignment requirements. The SecMigrationPei module locates interfaces that may be published in SEC and reinstalls the interface with permanent memory addresses. This is important if pre-memory address access is forbidden after memory initialization and data such as a PPI descriptor, PPI GUID, or PPI inteface reside in pre-memory. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Harry Han <harry.han@intel.com> Cc: Catharine West <catharine.west@intel.com> Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28UefiCpuPkg/CpuMpPei: Add GDT migration support (CVE-2019-11098)Michael Kubacki4-2/+60
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 Moves the GDT to permanent memory in a memory discovered callback. This is done to ensure the GDT authenticated in pre-memory is not fetched from outside a verified location after the permanent memory transition. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-07-28MdeModulePkg/PeiCore: Enable T-RAM evacuation in PeiCore (CVE-2019-11098)Michael Kubacki7-9/+1099
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 Introduces new changes to PeiCore to move the contents of temporary RAM visible to the PeiCore to permanent memory. This expands on pre-existing shadowing support in the PeiCore to perform the following additional actions: 1. Migrate pointers in PPIs installed in PeiCore to the permanent memory copy of PeiCore. 2. Copy all installed firmware volumes to permanent memory. 3. Relocate and fix up the PEIMs within the firmware volumes. 4. Convert all PPIs into the migrated firmware volume to the corresponding PPI address in the permanent memory location. This applies to PPIs and PEI notifications. 5. Convert all status code callbacks in the migrated firmware volume to the corresponding address in the permanent memory location. 6. Update the FV HOB to the corresponding firmware volume in permanent memory. 7. Use PcdMigrateTemporaryRamFirmwareVolumes to control if enable the feature or not. when disable the PCD, the EvacuateTempRam() will never be called. The function control flow as below: PeiCore() DumpPpiList() EvacuateTempRam() ConvertPeiCorePpiPointers() ConvertPpiPointersFv() MigratePeimsInFv() MigratePeim() PeiGetPe32Data() LoadAndRelocatePeCoffImageInPlace() MigrateSecModulesInFv() ConvertPpiPointersFv() ConvertStatusCodeCallbacks() ConvertFvHob() RemoveFvHobsInTemporaryMemory() DumpPpiList() Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Harry Han <harry.han@intel.com> Cc: Catharine West <catharine.west@intel.com> Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-07-28MdeModulePkg: Add new PCD to control the evacuate temporary memory feature ↵Guomin Jiang2-0/+15
(CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 The security researcher found that we can get control after NEM disable. The reason is that the flash content reside in NEM at startup and the code will get the content from flash directly after disable NEM. To avoid this vulnerability, the feature will copy the PEIMs from temporary memory to permanent memory and only execute the code in permanent memory. The vulnerability is exist in physical platform and haven't report in virtual platform, so the virtual can disable the feature currently. When enable the PcdMigrateTemporaryRamFirmwareVolumes, always shadow all PEIMs no matter the condition of PcdShadowPeimOnBoot or PcdShadowPeimOnS3Boot. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-07-28MdePkg Base.h: Delete prototype for __builtin_return_addressJessica Clarke1-1/+0
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1004 Being a compiler builtin, the type of __builtin_return_address is already known to the compiler so no prototype is needed. Clang also errors out when redeclaring certain builtins like this[1], though currently only for ones with custom type checking. At the moment, __builtin_return_address does not use custom type checking and so does not trigger this error, however, the CHERI fork of LLVM, which will form the basis of the toolchain for Arm's experimental Morello platform, does use custom type checking for it, and so gives an error. Thus, simply delete the unnecessary line. [1] llvm/llvm-project@41af97137572ad6d4dafc872e7ecf6bbb08d4984 Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-07-27MdePkg/Include/IndustryStandard: Main CXL headerJaveed, Ashraf1-0/+22
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611 Introducing the Cxl.h as the main header file to support all versions of Compute Express Link Specification register definitions. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-07-27MdePkg/Include/IndustryStandard: CXL 1.1 RegistersJaveed, Ashraf2-4/+571
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611 Register definitions from chapter 7 of Compute Express Link Specification Revision 1.1 are ported into the new Cxl11.h. The CXL Flex Bus registers are based on the PCIe Extended Capability DVSEC structure header, led to the inclusion of upgraded Pci.h. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-07-25CryptoPkg/OpensslLib: Upgrade OpenSSL to 1.1.1gGuomin Jiang10-87/+90
Upgrade openssl to 1.1.1g. the directory have been reorganized, openssl moved crypto/include/internal to include/crypto folder. So we change directory to match the re-organization. The dso_conf.h and opensslconf.h will generated in UNIX format, change process_files.pl to covent the EOL automatically. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2020-07-24Revert "BaseTools: Add gcc flag to warn on void* pointer arithmetic"Bob Feng1-3/+3
This reverts commit dbd546a32d5abe225306e22d43a7d86e3a042eee. This patch also breaks about half of the ARM/AARCH64 platforms in edk2-platforms Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-07-24IntelFsp2Pkg/Tools/GenCfgOpt.py: Fix a bug about parse macroTan, Ming1-3/+3
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2827 Fix a bug about parse the macro value which use another macro. Use the following example to verify: [Define] DEFINE M1 = V1 DEFINE M2 = $(M1)/V2 !include $(M2)/pcd.dsc The old code will failed parse M2 and cause following error: Traceback (most recent call last): File "Edk2\IntelFsp2Pkg\Tools\GenCfgOpt.py", line 1550, in <module> sys.exit(Main()) File "Edk2\IntelFsp2Pkg\Tools\GenCfgOpt.py", line 1513, in Main if GenCfgOpt.ParseDscFile(DscFile, FvDir) != 0: File "Edk2\IntelFsp2Pkg\Tools\GenCfgOpt.py", line 533, in ParseDscFile NewDscLines = IncludeDsc.readlines() ValueError: I/O operation on closed file. The tool should support the value use another macro, and expand it. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Ming Tan <ming.tan@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2020-07-24BaseTools/Scripts: Ignore the CRLF check when upgrade submodule.Jiang, Guomin1-1/+1
If the submodule is upgraded, skip the CRLF check as it isn't change for file. Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-07-23EmbeddedPkg: fix gcc build errors in AndroidBootImgLibLeif Lindholm1-2/+2
Commit dbd546a32d5a ("BaseTools: Add gcc flag to warn on void* pointer arithmetic") does its work and triggers build errors in this library. Update the affected code to build correctly again. Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Bob Feng<bob.c.feng@intel.com> Reported-by: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-07-23EmbeddedPkg: Fix build error for MmcDxePierre Gondois2-6/+10
The following command line: build -b NOOPT -a IA32 -t VS2017 -p edk2\EmbeddedPkg\EmbeddedPkg.dsc Generates the following error: MmcDxe.lib(Diagnostics.obj) : error LNK2001: unresolved external symbol __allshl MmcDxe.lib(Diagnostics.obj) : error LNK2001: unresolved external symbol __aullshr MmcDxe.lib(MmcBlockIo.obj) : error LNK2001: unresolved external symbol __allmul These erros are due to the use of shift/multiply operations on UINT64 variable on a IA32 architecture. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-07-23BaseTools: Fix binary file not generate map file issueFeng, YunhuaX1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2624 When EFI file come from binary file, not generate .map file, so need ignore the map file. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-07-23SecurityPkg/dsc: Add PeiTpmMeasurementLib.Jiewen Yao1-1/+3
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2020-07-23SecurityPkg/PeiTpmMeasurementLib: Add PEI instance.Jiewen Yao3-0/+141
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2020-07-23SecurityPkg/Tcg2: Add TcgPpiJiewen Yao2-27/+86
And do some code clean with updated function REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>