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2017-05-16MdeModulePkg/HiiDB: Avoid incorrect results of multiplicationDandan Bi1-12/+12
An example: The codes in function Output8bitPixel in Image.c: OffsetY = BITMAP_LEN_8_BIT ((UINT32) Image->Width, Ypos); Both Image->Width and Ypos are of type UINT16. They will be promoted to int (signed) first, and then perform the multiplication defined by macro BITMAP_LEN_8_BIT. If the result of multiplication between Image->Width and Ypos exceeds the range of type int, a potential incorrect results will be assigned to OffsetY. This commit adds explicit UINT32 type cast for 'Image->Width' to avoid possible overflow in the int range. And also fix similar issues in HiiDatabase. Cc: Eric Dong <eric.dong@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> (cherry picked from commit f76bc44362e5f0a2ea509c07b2f6846bd9833ee8)
2017-05-16MdeModulePkg/Dxe/Image: Restore mCurrentImage on all pathsHao Wu1-0/+6
This commit makes sure that in function CoreStartImage(), module variable 'mCurrentImage' is restored to the current start image context on all code paths. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 7a14d54f6c50a1ff73351e4aaee8570ec5f8a476)
2017-05-16IntelFrameworkModulePkg/IdeBusDxe: Fix undefined behavior in signed left shiftHao Wu1-3/+3
In function AtapiReadCapacity(), the following expression: IdeDev->BlkIo.Media->LastBlock = (Data.LastLba3 << 24) | (Data.LastLba2 << 16) | (Data.LastLba1 << 8) | Data.LastLba0; (There is also a similar case in this function.) will involve undefined behavior in signed left shift operations. Since Data.LastLbaX is of type UINT8, and IdeDev->BlkIo.Media->LastBlock is of type UINT64. Therefore, Data.LastLbaX will be promoted to int (32 bits, signed) first, and then perform the left shift operation. According to the C11 spec, Section 6.5.7: 4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated bits are filled with zeros. If E1 has an unsigned type, the value of the result is E1 * 2^E2 , reduced modulo one more than the maximum value representable in the result type. If E1 has a signed type and nonnegative value, and E1 * 2^E2 is representable in the result type, then that is the resulting value; otherwise, the behavior is undefined. So if bit 7 of Data.LastLba3 is 1, (Data.LastLba3 << 24) will be out of the range within int type. The undefined behavior of the signed left shift will lead to a potential of setting the high 32 bits of IdeDev->BlkIo.Media->LastBlock to 1 during the cast from type int to type UINT64. This commit will add an explicit UINT32 type cast for Data.LastLba3 to resolve this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit f90c4fff00bee5f654ad93afd0f74b99050960de)
2017-05-16MdeModulePkg/UsbBotPei: Fix undefined behavior in signed left shiftHao Wu1-3/+3
In function PeiUsbReadCapacity(), the following expression: LastBlock = (Data.LastLba3 << 24) | (Data.LastLba2 << 16) | (Data.LastLba1 << 8) | Data.LastLba0; (There is also a similar case in function PeiUsbReadFormattedCapacity().) will involve undefined behavior in signed left shift operations. Since Data.LastLbaX is of type UINT8, they will be promoted to int (32 bits, signed) first, and then perform the left shift operation. According to the C11 spec, Section 6.5.7: 4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated bits are filled with zeros. If E1 has an unsigned type, the value of the result is E1 * 2^E2 , reduced modulo one more than the maximum value representable in the result type. If E1 has a signed type and nonnegative value, and E1 * 2^E2 is representable in the result type, then that is the resulting value; otherwise, the behavior is undefined. So if bit 7 of Data.LastLba3 is 1, (Data.LastLba3 << 24) will be out of the range within int type. The undefined behavior of the signed left shift might incur potential issues. This commit will add an explicit UINT32 type cast for Data.LastLba3 to refine the codes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit a2617ed6277aeb62fbde3e428c582912cf9980e2)
2017-05-16MdeModulePkg/UfsBlkIoPei: Fix undefined behavior in signed left shiftHao Wu1-3/+3
In function UfsBlockIoPeimGetMediaInfo(), the following expression: Private->Media[DeviceIndex].LastBlock = (Capacity16.LastLba3 << 24) | (Capacity16.LastLba2 << 16) | (Capacity16.LastLba1 << 8) | Capacity16.LastLba0; (There is also a similar case in this function.) will involve undefined behavior in signed left shift operations. Since Capacity16.LastLbaX is of type UINT8, and Private->Media[DeviceIndex].LastBlock is of type UINT64. Therefore, Capacity16.LastLbaX will be promoted to int (32 bits, signed) first, and then perform the left shift operation. According to the C11 spec, Section 6.5.7: 4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated bits are filled with zeros. If E1 has an unsigned type, the value of the result is E1 * 2^E2 , reduced modulo one more than the maximum value representable in the result type. If E1 has a signed type and nonnegative value, and E1 * 2^E2 is representable in the result type, then that is the resulting value; otherwise, the behavior is undefined. So if bit 7 of Capacity16.LastLba3 is 1, (Capacity16.LastLba3 << 24) will be out of the range within int type. The undefined behavior of the signed left shift will lead to a potential of setting the high 32 bits of Private->Media[DeviceIndex].LastBlock to 1 during the cast from type int to type UINT64. This commit will add an explicit UINT32 type cast for Capacity16.LastLba3 to resolve this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit da117dda23955250e63052d3504edfb38439f12c)
2017-05-16MdeModulePkg/IdeBusPei: Fix undefined behavior in signed left shiftHao Wu1-2/+2
In function ReadCapacity(), the following expression: MediaInfo->LastBlock = (Data.LastLba3 << 24) | (Data.LastLba2 << 16) | (Data.LastLba1 << 8) | Data.LastLba0; (There is also a similar case in this function.) will involve undefined behavior in signed left shift operations. Since Data.LastLbaX is of type UINT8, and MediaInfo->LastBlock is of type UINTN. Therefore, Data.LastLbaX will be promoted to int (32 bits, signed) first, and then perform the left shift operation. According to the C11 spec, Section 6.5.7: 4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated bits are filled with zeros. If E1 has an unsigned type, the value of the result is E1 * 2^E2 , reduced modulo one more than the maximum value representable in the result type. If E1 has a signed type and nonnegative value, and E1 * 2^E2 is representable in the result type, then that is the resulting value; otherwise, the behavior is undefined. So if bit 7 of Data.LastLba3 is 1, (Data.LastLba3 << 24) will be out of the range within int type. The undefined behavior of the signed left shift will lead to a potential of setting the high 32 bits of MediaInfo->LastBlock to 1 during the cast from type int to type UINT64 for X64 builds. This commit will add an explicit UINT32 type cast for Data.LastLba3 to resolve this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit 3778a4dfcd8d8286de3eed6fb5e33871854879e5)
2017-05-16MdeModulePkg/ScsiDiskDxe: Fix undefined behavior in signed left shiftHao Wu1-2/+2
In function GetMediaInfo(), the following expression: ScsiDiskDevice->BlkIo.Media->LastBlock = (Capacity10->LastLba3 << 24) | (Capacity10->LastLba2 << 16) | (Capacity10->LastLba1 << 8) | Capacity10->LastLba0; will involve undefined behavior in signed left shift operations. Since Capacity10->LastLbaX is of type UINT8, and ScsiDiskDevice->BlkIo.Media->LastBlock is of type UINT64. Therefore, Capacity10->LastLbaX will be promoted to int (32 bits, signed) first, and then perform the left shift operation. According to the C11 spec, Section 6.5.7: 4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated bits are filled with zeros. If E1 has an unsigned type, the value of the result is E1 * 2^E2 , reduced modulo one more than the maximum value representable in the result type. If E1 has a signed type and nonnegative value, and E1 * 2^E2 is representable in the result type, then that is the resulting value; otherwise, the behavior is undefined. So if bit 7 of Capacity10->LastLba3 is 1, (Capacity10->LastLba3 << 24) will be out of the range within int type. The undefined behavior of the signed left shift will lead to a potential of setting the high 32 bits of ScsiDiskDevice->BlkIo.Media->LastBlock to 1 during the cast from type int to type UINT64. This commit will add an explicit UINT32 type cast for Capacity10->LastLba3 to resolve this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> (cherry picked from commit 7c115e775b439661b06e84edda0670098c81d354)
2017-04-25MdeModulePkg: Update PcdSmbiosVersion to 0x0301 for SMBIOS spec 3.1.0Star Zeng1-2/+2
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=340 Cc: Feng Tian <feng.tian@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit e1108d9735f870ef9ad18ad0d1137b7d22d80140)
2017-04-25MdePkg: Add definitions for SMBIOS spec 3.1.0Star Zeng1-4/+42
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=340 TPM Device (Type 43) definition has been added at 713e4b007cb791829397522ad8f366dd1e08bee6. This patch is to add definitions for below items. • BIOS Information (Type 0): – Add new entry for extended BIOS ROM size • System Enclosure or Chassis (Type 3): – Add new chassis types: IoT Gateway and Embedded PC – Add new chassis types: Mini PC and Stick PC • Processor Information (Type 4): – Add Intel Core m3 m5 m7 processors – Add processor socket AM4 – Add processor socket LGA1151 – Add processor socket BGA1356, BGA1440, BGA1515 – Add AMD Opteron A-Series processor – Add processor socket LGA3647-1 – Add processor socket SP3 Processors – Add families for ARMv7 and ARMv8 – Add family for AMD Opteron(TM) X3000 Series APU • Cache Information (Type 7): – Extend to support Cache sizes >2047 MB • System Slots (Type 9): – Add Mini PCIe support Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit ff6a1f3211f1346c66600352b53b0881ebbcf63e)
2017-04-25MdePkg/SmBios.h: Add new defines for SMBIOS record type 43Linson Augustine1-0/+18
Added definitions for the new SMBIOS Type 43 record. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Augustine Linson P <linson.augustine@hpe.com> Reviewed-by: Star Zeng <star.zeng@intel.com> (cherry picked from commit 713e4b007cb791829397522ad8f366dd1e08bee6)
2017-04-25MdePkg: Move SMBIOS data into the IndustryStandard header.Marvin Häuser2-90/+133
As the SMBIOS table types belong to the SMBIOS standard, they were moved from the SMBIOS Protocol header into the SMBIOS IndustryStandard header without the EFI_-prefix. Defines with the EFI_-prefix have been kept in the Protocol header for backwards-compatibility, resolving to the IndustryStandard defines. The same has been done with the C types. The SMBIOS table header structure had been duplicated - SMBIOS_STRUCTURE in the IndustryStandard header and EFI_SMBIOS_TABLE_HEADER in the Protocol file - and thus the Protocol type was replaced with a typedef to the InudstryStandard's. This doesn't only make it easier to maintain, but it also prevents potential future issues as the Protocol type has been aligned, while the standard and the IndustryStandard header declare it as byte-packed. This has worked well till now only because the members of the structure do not require alignment yet. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com> Reviewed-by: Star Zeng <star.zeng@intel.com> (cherry picked from commit bb7051eba96f87bbb6544cad9cd7390207b4dcc0)
2017-03-09SecuritPkg: Tcg2Smm: Add PlatformClass to TPM2 TableZhang, Chao B2-0/+11
Add PlatformClass info into TPM2 ACPI table, it is only valid with table Rev 4 and later. Cc: Star Zeng <star.zeng@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> (cherry picked from commit bf3b7aae7100b60ff8a387f0b7604dbb6ff29fc9)
2017-03-09SecurityPkg: Tcg2Smm: Fix incompatible changeZhang, Chao B1-3/+3
Address incompatible change introduced in patch 8f07a374b1d0497b6676491de8cbe2f08f4f7e9f Cc: Star Zeng <star.zeng@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> (cherry picked from commit 0772737347816ced8df6299b1c88cccb9de9164c)
2017-03-09MdePkg: Tpm2Acpi.h: Fix incompatible changeZhang, Chao B1-2/+5
Fix incompatible change. Some modules are still referencing old definition. Cc: Star Zeng <star.zeng@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> (cherry picked from commit 50f670acf9bb2efcf778ce71e9a3d2250ac0bb99)
2017-03-09SecurityPkg: Tcg2Config: TPM2 ACPI Table Rev OptionZhang, Chao B5-6/+24
Add TPM2 ACPI Table Rev Option in Tcg2Config UI. Rev 4 is defined in TCG ACPI Specification 00.37 Cc: Star Zeng <star.zeng@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> (cherry picked from commit fca422890777a02c027061fbceee454c9f117870)
2017-03-09MdePkg: Tpm2Acpi.h: Update TPM2 ACPI table versionZhang, Chao B1-3/+5
Update TPM2 ACPI Table revision to 4. New version & data structure is defined in TCG ACPI Spec 00.37 Cc: Star Zeng <star.zeng@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> (cherry picked from commit 8f07a374b1d0497b6676491de8cbe2f08f4f7e9f)
2017-03-09SecurityPkg: Tcg2ConfigDxe: Remove duplicate local variableZhang, Chao B1-1/+0
Remove duplicate local status variable declaration. Cc: Bi Dandan <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Bi Dandan <dandan.bi@intel.com>
2017-03-09SecurityPkg Tcg2ConfigDxe: Add setup option to configure PPI versionStar Zeng2-6/+12
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=288 gEfiSecurityPkgTokenSpaceGuid.PcdTcgPhysicalPresenceInterfaceVer was introduced to configure physical presence interface version. but test or user needs to build different images to support different versions separately as the PCD does not support Dynamic types. This patch is to extend the PCD to support Dynamic types and add a setup option in Tcg2ConfigDxe driver to configure the physical presence interface version, the PCD needs to be DynamicHii type and maps to the setup option. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> (cherry picked from commit dd6d0a520eec0fd3fc455ac7345ac0c06095a511)
2017-03-06SecurityPkg: Tcg2ConfigDxe/Tcg2Smm: Fix TPM2 HID issueZhang, Chao B2-4/+4
Fix wrong TPM2 HID generation logic. Cc: Star Zeng <star.zeng@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
2017-03-06SecuritPkg: Tcg2: Fix coding style issueZhang, Chao B2-15/+15
Fix coding style issue Cc: Bi Dandan <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Bi Dandan <dandan.bi@intel.com>
2017-03-06SecurityPkg: Tcg2ConfigDxe: Display TPM2 HID in Tcg2ConfigZhang, Chao B5-6/+120
Display TPM2 HID from TPM2 ACPI device object in Tcg2Config UI Cc: Long Qin <qin.long@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Conflicts: SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigStrings.uni
2017-03-06SecurityPkg: Tcg2Smm: Update HID patch logicZhang, Chao B3-10/+11
Update HID patch logic. NOOP in ASL template may cause syntax error when disassembled and recompiled. Cc: Long Qin <qin.long@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Conflicts: SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
2017-03-06SecurityPkg: Tcg2Smm: TPM2 Vendor specific HIDZhang, Chao B5-6/+130
Update TPM2 HID using vendor ManufacturerID & FirmwareVersion1. Cc: Yao Jiewen <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-03-02SecurityPkg: Add Pcd PROMPT/HELP & Chang default settingZhang, Chao B2-2/+2
Update PCD PcdTcg2PhysicalPresenceFlags default setting. Also add PROMPT, HELP string. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Conflicts: SecurityPkg/SecurityPkg.uni
2017-03-02SecurityPkg: Tcg2PhysicalPresence: Define TCG2 PP Flags Initial PcdZhang, Chao B3-2/+12
Define PcdTcg2PhysicalPresenceFlags to initialize TCG2 PP Flags setting. Cc: Yao Jiewen <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Conflicts: SecurityPkg/SecurityPkg.dec
2016-12-19NetworkPkg: Replace ASSERT with error return code in PXE and HTTP boot driver.Fu Siyuan4-69/+188
This patch remove the ASSERT when receive a DHCP packet large than the maximum cache buffer size. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> (cherry picked from commit a35dc6499beb0b76c340379a06dff74a8d38095a)
2016-12-19MdeModulePkg: Replace ASSERT with error return code in PXE driver.Fu Siyuan2-36/+68
This patch remove the ASSERT when receive a DHCP packet large than the maximum cache buffer size. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> (cherry picked from commit 471342bbefaac1c21fe7fa4e80949b552b12fbdd)
2016-12-15NetworkPkg UefiPxeBcDxe: Fix build error for lastest VS2015 compilerHao Wu1-2/+2
The UefiPxeBcDxe module encounters a build error for IA32 arch using the latest version of VS2015: UefiPxeBcDxe.lib(PxeBcBoot.obj) : error LNK2001: unresolved external symbol __allmul The cause is line 148 in file NetworkPkg\UefiPxeBcDxe\PxeBcBoot.c. The third parameter for gBS->SetTimer() function is of type UINT64, so the multiplication should use the MultU64x32() function now. Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit b4815479d6cab7fb9edf222a11e58a3721863a4c)
2016-12-15NetworkPkg IScsiDxe: Fix build error for lastest VS2015 compilerHao Wu1-1/+5
The IScsiDxe module encounters a build error for IA32 arch using the latest version of VS2015: IScsiDxe.lib(IScsiProto.obj) : error LNK2001: unresolved external symbol __allmul The cause is line 141 in file NetworkPkg\IScsiDxe\IScsiProto.c. The third parameter for gBS->SetTimer() function is of type UINT64, so the multiplication should use the MultU64x32() function now. Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 689c9d975d273eeae6fdcebe042577ccf1e5e6f7)
2016-12-15MdeModulePkg UefiPxeBcDxe: Fix build error for lastest VS2015 compilerHao Wu1-1/+1
The UefiPxeBcDxe module encounters a build error for IA32 arch using the latest version of VS2015: UefiPxe4BcDxe.lib(PxeBcDhcp.obj) : error LNK2001: unresolved external symbol __allmul The cause is line 1659 in file MdeModulePkg/Universal/Network/UefiPxeBcDxe/PxeBcDhcp.c. The third parameter for gBS->SetTimer() function is of type UINT64, so the multiplication should use the MultU64x32() function. Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com> (cherry picked from commit e719fcb5e172837b0df2ebdb4f0f74d96b5244e7)
2016-12-15SecurityPkg/OpalPasswordDxe: Make comments align with the functionDandan Bi1-2/+2
Cc: Eric Dong <eric.dong@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit 26f7580566fa7124776b3cef92a64f7f5a131900)
2016-12-12NetworkPkg:Fix bug when parsing the dhcp6 option 16Zhang, Lubo1-2/+2
when to parse the DHCP6 reply packet,there will be 6 bytes offset before the option data according to RFC 3315. Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Zhang Lubo <lubo.zhang@intel.com> Reviewed-by: Reviewed-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> (cherry picked from commit 3decba3d32382e22357de4eb25da1aedf6462861)
2016-12-12MdeModulePkg VariableSmm: Do not need check CommBufferSize bufferStar Zeng1-5/+4
Current code in SmmVariableHandler() checks CommBufferSize buffer to make sure it points to outside SMRAM in "case SMM_VARIABLE_FUNCTION_GET_STATISTICS". But after eaae7b33b1cf6b9f21db1636f219c2b6a8d88afd, CommBufferSize buffer points to SMRAM that was used by SMM core to cache CommSize from SmmCommunication protocol, then the check will fail definitely and GET_STATISTICS feature breaks. In fact, do not need check CommBufferSize buffer at all even before eaae7b33b1cf6b9f21db1636f219c2b6a8d88afd. Before eaae7b33b1cf6b9f21db1636f219c2b6a8d88afd, CommBufferSize buffer pointed to gSmmCorePrivate->BufferSize that is outside SMRAM, the check will success definitely; after eaae7b33b1cf6b9f21db1636f219c2b6a8d88afd, CommBufferSize buffer points to local variable BufferSize (in SMRAM) in SmmEntryPoint(), the check is not needed definitely. The patch is to remove the check. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit 62016c1e898434a0326f658912b1e7e0a9c5575e)
2016-12-09Security/OpalPasswordDxe: Enhance the logic in RouteConfig/ExtractConfigDandan Bi1-0/+15
Make the implementation of RouteConfig/ExtractConfig function follow the UEFI spec. Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit eafbd7a2325e39480c5be71cc8f456c78f1bfed0)
2016-12-05IntelFsp2Pkg: 41d739e breaks flat tree buildZeng, Star1-5/+8
There may be no environment variable PACKAGES_PATH defined in flat tree, then 41d739e breaks flat tree build. This patch is to update GenCfgOpt.py to be compatible with both flat tree and package path build. Cc: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Tested-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> (cherry picked from commit 60131098f302d9e449e95c53dec328aaf828076b)
2016-12-02UefiCpuPkg/PiSmmCpuDxeSmm: Clear some semaphores on S3 boot pathJeff Fan1-0/+3
Some semaphores are not cleared on S3 boot path. For example, mSmmMpSyncData->CpuData[CpuIndex].Present. It may still keeps the value set at SMM runtime during S3 resume. It may causes BSP have the wrong judgement on SMM AP's present state. We have one related fix at e78a2a49ee6b0c0d7c6997c87ace31d7761cf636. But that is not completed. This fix is to clear Busy/Run/Present semaphores in InitializeMpSyncData(). Cc: Laszlo Ersek <lersek@redhat.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit 56e4a7d72660b229be333bbb5e1b5790d3c17890)
2016-11-30IntelFsp2Pkg: Add PACKAGES_PATH supportThomaiyar, Richard Marian1-3/+7
Add PACKAGES_PATH support in GenCfgOpt.py Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 41d739e4ecb189e1c5e478a55a8a21b0784f2c76)
2016-11-30IntelFsp2Pkg: Use FspSiliconInitDone2 APIThomaiyar, Richard Marian1-1/+1
Use FspSiliconInitDone2 API in Notify Phase Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit 0e3f9ee1d61fdc37a4aef18c53dfcc2cedeb86e3)
2016-11-30IntelFsp2Pkg: Support to return error status from FSP API doneThomaiyar, Richard Marian2-23/+163
Added FspMemoryInitDone2, FspTempRamExitDone2, FspSiliconInitDone2 to return error status to Boot Loader for FSP API calls. To maintain backward compatibility existing functions (FspMemoryInitDone, FspTempRamExitDone, FspSiliconInitDone) declaration left untouched. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit f56ae7bf82bf32dd0ec9cafb9f632511813c823e)
2016-11-28SecurityPkg Tcg2ConfigDxe: Remove BlockSID actions and related stringsStar Zeng2-3/+0
Tcg2ConfigDxe has no related code to handle BlockSID related actions that have been covered by OpalPasswordDxe driver. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit 4e3b05a49f454bc257252ae9090421e3c8447737)
2016-11-28SecurityPkg OpalPasswordDxe: Use PP actions to enable BlockSIDEric Dong7-60/+159
Update the implementation to use PP BlockSID related actions. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit 34c2ce65291081241abc995438f3b89da65d1294)
2016-11-28SecurityPkg Tcg2PPLib: Support BlockSID related actionsStar Zeng4-82/+232
Then Tcg2PhysicalPresenceLib can support TCG2 PP TPM2, storage management and vendor specific requests according to Physical Presence Interface Specification. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit e92ddda2b547f0b952935abaf44fd72e97dbf755)
2016-11-28SecurityPkg OpalPasswordDxe: Clean PSID buffer.Eric Dong2-10/+17
Change callback handler type to avoid saving PSID info in browser temp buffer. Also clean the buffer after using it. Cc: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit 01dd077315c6759c94af9af4232f8318db13cf8d)
2016-11-28SecurityPkg OpalPasswordDxe: Clean password buffer.Eric Dong2-4/+14
Cc: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit bee13c00218f3ed3118d8d87683c11b31ca04564)
2016-11-25MdeModulePkg/DriverSample: Remove the password related codesDandan Bi5-286/+1
In current DriverSampleDxe, the sample code of password is not a good example, so we plan to remove it. Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 6bfd7ea7d65af28910779b9c72ff2e5fd3a2a54e)
2016-11-25MdeModulePkg/DriverSampleDxe: Remove the non-interactive passwordDandan Bi2-11/+0
Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 87f04621ad4069c3b2994bc217971d1c5a53fa82)
2016-11-25MdeModulePkg: Clear the buffer after using itDandan Bi2-1/+3
Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit a275df8f9a4d2a43772ea5d1765b541a1191ad3f)
2016-11-25MdeModulePkg/SetupBrowser:Don't support password without interactive flagDandan Bi1-21/+2
In current SetupBrowser, the logic related to non-interative password is not correct. How to support it correctly or whether support it is still under investigation. First step remove the incorrect logic. Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 9e2462b8a28b09738a3177e1694867ca114cc185)
2016-11-25MdeModulePkg/DisplayEngine: Popup dialogue when password is not supportedDandan Bi4-1/+10
when the password is not supported, pop up a dialogue to let user know the reason. Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 88f0c4e29c03600f2a45a5bd14c500049d2b09dc)
2016-11-24MdeModulePkg/Xhci: Add 10ms delay before sending SendAddr cmd to devFeng Tian4-4/+31
We send ADDRESS DEVICE CMD in XhcInitializeDeviceSlot(), which will cause XHC issue a USB SET_ADDRESS request to the USB Device. According to USB spec, there should have a 10ms delay before this operation after resetting a given port. But in original code, there is a possible path which may have no such 10ms delay: UsbHubResetPort()->UsbHubSetPortFeature()->Stall(20)->UsbHubGetPortSt atus()->XhcPollPortStatusChange()->(if RESET_C bit is set)-> XhcInitializeDeviceSlot()->(if RESET_C bit is set)->Stall(10) So this patch is used to fix above issue. Cc: Star Zeng <star.zeng@intel.com> Cc: Baraneedharan Anbazhagan <anbazhagan@hp.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Tested-by: Baraneedharan Anbazhagan <anbazhagan@hp.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
generated by cgit v1.1 at 2024-09-17 17:09:18 +0000