diff options
Diffstat (limited to 'MdePkg/Library')
-rw-r--r-- | MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 | ||||
-rw-r--r-- | MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 | ||||
-rw-r--r-- | MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 | ||||
-rw-r--r-- | MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15 |
4 files changed, 39 insertions, 3 deletions
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf index c4cd29a..6b230f6 100644 --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf @@ -8,6 +8,7 @@ # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -25,7 +26,7 @@ #
-# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
#
[Sources.IA32]
@@ -61,6 +62,10 @@ [Sources.RISCV64]
RiscV/Cpu.S
+[Sources.LOONGARCH64]
+ LoongArch/CpuFlushTlb.S | GCC
+ LoongArch/CpuSleep.S | GCC
+
[Packages]
MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni index 80dc495..7c5c8df 100644 --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni @@ -1,13 +1,14 @@ // /** @file
// Instance of CPU Library for various architecture.
//
-// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
+// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
// PAL CALLs for IPF, and empty functions for EBC.
//
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
// Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -16,5 +17,5 @@ #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU Library for various architectures"
-#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, and empty functions for EBC."
+#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, PAL CALLs for IPF, and empty functions for EBC."
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S new file mode 100644 index 0000000..8b792f0 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S @@ -0,0 +1,15 @@ +#------------------------------------------------------------------------------
+#
+# CpuFlushTlb() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(CpuFlushTlb)
+
+ASM_PFX(CpuFlushTlb):
+ tlbflush
+ jirl $zero, $ra, 0
+ .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S new file mode 100644 index 0000000..eb31b10 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S @@ -0,0 +1,15 @@ +#------------------------------------------------------------------------------
+#
+# CpuSleep() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(CpuSleep)
+
+ASM_PFX(CpuSleep):
+ idle 0
+ jirl $zero, $ra, 0
+ .end
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