diff options
Diffstat (limited to 'IntelFrameworkModulePkg')
7 files changed, 797 insertions, 0 deletions
diff --git a/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec b/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec index f129aa3..0a296c6 100644 --- a/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec +++ b/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec @@ -64,6 +64,8 @@ PcdIsaBusSupportDma|0x00010040|gEfiIntelFrameworkModulePkgTokenSpaceGuid|BOOLEAN|TRUE
PcdIsaBusOnlySupportSlaveDma|0x00010041|gEfiIntelFrameworkModulePkgTokenSpaceGuid|BOOLEAN|FALSE
PcdIsaBusSupportIsaMemory|0x00010042|gEfiIntelFrameworkModulePkgTokenSpaceGuid|BOOLEAN|TRUE
+ PcdPciCfgDisable|0x00010043|gEfiIntelFrameworkModulePkgTokenSpaceGuid|BOOLEAN|FALSE
+ PcdPciCfg2Disable|0x00010044|gEfiIntelFrameworkModulePkgTokenSpaceGuid|BOOLEAN|FALSE
[PcdsFixedAtBuild.common]
PcdStatusCodeMemorySize|0x00010025|gEfiIntelFrameworkModulePkgTokenSpaceGuid|UINT16|1
diff --git a/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dsc b/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dsc index 22212e6..559f1c9 100644 --- a/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dsc +++ b/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dsc @@ -126,6 +126,8 @@ PcdIsaBusSupportDma|gEfiIntelFrameworkModulePkgTokenSpaceGuid|TRUE
PcdIsaBusOnlySupportSlaveDma|gEfiIntelFrameworkModulePkgTokenSpaceGuid|FALSE
PcdIsaBusSupportIsaMemory|gEfiIntelFrameworkModulePkgTokenSpaceGuid|TRUE
+ PcdPciCfgDisable|gEfiIntelFrameworkModulePkgTokenSpaceGuid|TRUE
+ PcdPciCfg2Disable|gEfiIntelFrameworkModulePkgTokenSpaceGuid|TRUE
PcdNtEmulatorEnable|gEfiMdeModulePkgTokenSpaceGuid|FALSE
[PcdsFixedAtBuild.common]
@@ -174,6 +176,7 @@ $(WORKSPACE)/IntelFrameworkModulePkg/Universal/SetupBrowserDxe/SetupBrowser.inf
$(WORKSPACE)/IntelFrameworkModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.inf
$(WORKSPACE)/IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
+ $(WORKSPACE)/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf
$(WORKSPACE)/IntelFrameworkModulePkg/Bus/Pci/VgaMiniPortDxe/VgaMiniPortDxe.inf
[Components.IA32]
diff --git a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf new file mode 100644 index 0000000..d53e2bb --- /dev/null +++ b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf @@ -0,0 +1,60 @@ +#/** @file
+# Single Segment Pci Configuration PPI
+#
+# This file declares PciCfg PPI used to access PCI configuration space in PEI
+# Copyright (c) 2006 - 2007, Intel Corporation
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PcatSingleSegmentPciCfgPei
+ FILE_GUID = 27A5159D-5E61-4809-919A-422E887101EF
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+ ENTRY_POINT = PeimInitializePciCfg
+
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources.common]
+ PciCfg.c
+ PciCfg2.c
+ PciCfgInternal.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+
+
+[LibraryClasses]
+ PeimEntryPoint
+ PciLib
+ BaseLib
+ DebugLib
+
+
+[Ppis]
+ gEfiPciCfg2PpiGuid # PPI ALWAYS_PRODUCED
+ gEfiPciCfgPpiInServiceTableGuid # PPI ALWAYS_PRODUCED
+
+[PcdsFeatureFlag.common]
+ PcdPciCfgDisable|gEfiIntelFrameworkModulePkgTokenSpaceGuid
+ PcdPciCfg2Disable|gEfiIntelFrameworkModulePkgTokenSpaceGuid
+
+[Depex]
+ TRUE
+
diff --git a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg.c b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg.c new file mode 100644 index 0000000..20bee53 --- /dev/null +++ b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg.c @@ -0,0 +1,174 @@ +/*++
+
+ Copyright (c) 2006 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+
+Module Name:
+
+ PciCfg.c
+
+Abstract:
+
+ Single Segment Pci Configuration PPI
+
+Revision History
+
+--*/
+
+#include "PciCfgInternal.h"
+
+
+/**
+ PCI read operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param This Pointer to local data for the interface.
+ @param Width The width of the access. Enumerated in bytes.
+ @param Address The physical address of the access.
+ @param Buffer A pointer to the buffer of data.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_INVALID_PARAMETER Unsupported width
+ enumeration.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfgRead (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+ )
+{
+ UINTN PciLibAddress;
+
+ PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
+ switch (Width) {
+ case EfiPeiPciCfgWidthUint8:
+ * (UINT8 *) Buffer = PciRead8 (PciLibAddress);
+ break;
+
+ case EfiPeiPciCfgWidthUint16:
+ * (UINT16 *) Buffer = PciRead16 (PciLibAddress);
+ break;
+
+ case EfiPeiPciCfgWidthUint32:
+ * (UINT32 *) Buffer = PciRead32 (PciLibAddress);
+ break;
+
+ default:
+ return EFI_INVALID_PARAMETER;
+ }
+ return EFI_SUCCESS;
+}
+
+
+/**
+ PCI write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param This Pointer to local data for the interface.
+ @param Width The width of the access. Enumerated in bytes.
+ @param Address The physical address of the access.
+ @param Buffer A pointer to the buffer of data.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+
+ @retval EFI_INVALID_PARAMETER Unsupported width
+ enumeration.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfgWrite (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+ )
+{
+ UINTN PciLibAddress;
+
+ PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
+ switch (Width) {
+ case EfiPeiPciCfgWidthUint8:
+ PciWrite8 (PciLibAddress, *(UINT8 *) Buffer);
+ break;
+
+ case EfiPeiPciCfgWidthUint16:
+ PciWrite16 (PciLibAddress, *(UINT16 *) Buffer);
+ break;
+
+ case EfiPeiPciCfgWidthUint32:
+ PciWrite32 (PciLibAddress, *(UINT32 *) Buffer);
+ break;
+
+ default:
+ return EFI_INVALID_PARAMETER;
+ }
+ return EFI_SUCCESS;
+}
+
+
+/**
+ PCI read-modify-write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param This Pointer to local data for the interface.
+ @param Width The width of the access. Enumerated in bytes.
+ @param Address The physical address of the access.
+ @param SetBits Value of the bits to set.
+ @param ClearBits Value of the bits to clear.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_INVALID_PARAMETER Unsupported width
+ enumeration.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfgModify (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN SetBits,
+ IN UINTN ClearBits
+ )
+{
+ UINTN PciLibAddress;
+
+ PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
+ switch (Width) {
+ case EfiPeiPciCfgWidthUint8:
+ PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
+ break;
+
+ case EfiPeiPciCfgWidthUint16:
+ PciAndThenOr16 (PciLibAddress, (UINT16)~ClearBits, (UINT16)SetBits);
+ break;
+
+ case EfiPeiPciCfgWidthUint32:
+ PciAndThenOr32 (PciLibAddress, (UINT32)~ClearBits, (UINT32)SetBits);
+ break;
+
+ default:
+ return EFI_INVALID_PARAMETER;
+ }
+ return EFI_SUCCESS;
+}
diff --git a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg2.c b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg2.c new file mode 100644 index 0000000..214a505 --- /dev/null +++ b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg2.c @@ -0,0 +1,270 @@ +/**
+
+ Copyright (c) 2006 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "PciCfgInternal.h"
+
+/**
+ @par Ppi Description:
+ The EFI_PEI_PCI_CFG2_PPI interfaces are used to abstract
+ accesses to PCI controllers behind a PCI root bridge
+ controller.
+
+ @param Read PCI read services. See the Read() function description.
+
+ @param Write PCI write services. See the Write() function description.
+
+ @param Modify PCI read-modify-write services. See the Modify() function description.
+
+ @param Segment The PCI bus segment which the specified functions will access.
+
+**/
+GLOBAL_REMOVE_IF_UNREFERENCED
+EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {
+ PciCfg2Read,
+ PciCfg2Write,
+ PciCfg2Modify
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED
+EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPciCfg2PpiGuid,
+ &gPciCfg2Ppi
+};
+
+
+/**
+ @par Ppi Description:
+ The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
+ controllers behind a PCI root bridge controller.
+
+ @param Read PCI read services. See the Read() function description.
+
+ @param Write PCI write services. See the Write() function description.
+
+ @param Modify PCI read-modify-write services. See the Modify() function description.
+
+ @param Segment The PCI bus segment which the specified functions will access.
+
+**/
+GLOBAL_REMOVE_IF_UNREFERENCED
+EFI_PEI_PCI_CFG_PPI gPciCfgPpi = {
+ PciCfgRead,
+ PciCfgWrite,
+ PciCfgModify
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED
+EFI_PEI_PPI_DESCRIPTOR gPciCfgPpiList = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPciCfgPpiInServiceTableGuid,
+ &gPciCfgPpi
+};
+
+/**
+ Reads from a given location in the PCI configuration space.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes.
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.
+
+ @param Address The physical address of the access. The format of
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
+
+ @param Buffer A pointer to the buffer of data..
+
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_DEVICE_ERROR There was a problem with the transaction.
+
+ @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this
+ time.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfg2Read (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+)
+{
+ UINTN PciLibAddress;
+
+ PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
+
+ if (Width == EfiPeiPciCfgWidthUint8) {
+ *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
+ } else if (Width == EfiPeiPciCfgWidthUint16) {
+ *((UINT16 *) Buffer) = PciRead16 (PciLibAddress);
+ } else if (Width == EfiPeiPciCfgWidthUint32) {
+ *((UINT32 *) Buffer) = PciRead32 (PciLibAddress);
+ } else {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Write to a given location in the PCI configuration space.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes.
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.
+
+ @param Address The physical address of the access. The format of
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
+
+ @param Buffer A pointer to the buffer of data..
+
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_DEVICE_ERROR There was a problem with the transaction.
+
+ @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this
+ time.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfg2Write (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+)
+{
+ UINTN PciLibAddress;
+
+ PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
+
+ if (Width == EfiPeiPciCfgWidthUint8) {
+ PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
+ } else if (Width == EfiPeiPciCfgWidthUint16) {
+ PciWrite16 (PciLibAddress, *((UINT16 *) Buffer));
+ } else if (Width == EfiPeiPciCfgWidthUint32) {
+ PciWrite32 (PciLibAddress, *((UINT32 *) Buffer));
+ } else {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ PCI read-modify-write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes. Type
+ EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
+
+ @param Address The physical address of the access.
+
+ @param SetBits Points to value to bitwise-OR with the read configuration value.
+
+ The size of the value is determined by Width.
+
+ @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.
+ The size of the value is determined by Width.
+
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_DEVICE_ERROR There was a problem with the transaction.
+
+ @retval EFI_DEVICE_NOT_READY The device is not capable of supporting
+ the operation at this time.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfg2Modify (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN CONST VOID *SetBits,
+ IN CONST VOID *ClearBits
+)
+{
+ UINTN PciLibAddress;
+
+ PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
+
+ if (Width == EfiPeiPciCfgWidthUint8) {
+ PciAndThenOr8 (PciLibAddress, ~(*(UINT8 *)ClearBits), *((UINT8 *) SetBits));
+ } else if (Width == EfiPeiPciCfgWidthUint16) {
+ PciAndThenOr16 (PciLibAddress, ~ReadUnaligned16 ((UINT16 *) ClearBits), ReadUnaligned16 ((UINT16 *) SetBits));
+ } else if (Width == EfiPeiPciCfgWidthUint32) {
+ PciAndThenOr32 (PciLibAddress, ~ReadUnaligned32 ((UINT32 *) ClearBits), ReadUnaligned32 ((UINT32 *) SetBits));
+ } else {
+ return EFI_INVALID_PARAMETER;
+ }
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS
+EFIAPI
+PeimInitializePciCfg (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+
+ Status = EFI_SUCCESS;
+
+ if ((**PeiServices).Hdr.Revision < PEI_SERVICES_REVISION) {
+ //
+ // BugBug: Curently, the FrameworkPkg does not define
+ // FRAMEWORK_PEI_SERVICES. So, In order to install
+ // the PeiServices.PciCfg(), we casttype
+ // EFI_PEI_PCI_CFG_PPI to EFI_PEI_PCI_CFG2_PPI.
+ // After defining the FRAMEWORK_PEI_SERVICES. this should
+ // be updated as:
+ //
+ // FrameworkPeiServices = (FRAMEWORK_PEI_SERVICES **) PeiServices;
+ // (**FrameworkPeiServices).PciCfg = &mPciCfgPpi;
+ //
+ (**PeiServices).PciCfg = (EFI_PEI_PCI_CFG2_PPI *) &gPciCfgPpi;
+ } else {
+ (**PeiServices).PciCfg = &gPciCfg2Ppi;
+ }
+
+ if (!FeaturePcdGet (PcdPciCfgDisable)) {
+ Status = (**PeiServices).InstallPpi (PeiServices, &gPciCfgPpiList);
+ }
+ if (!FeaturePcdGet (PcdPciCfg2Disable)) {
+ Status = (**PeiServices).InstallPpi (PeiServices, &gPciCfg2PpiList);
+ }
+
+ return Status;
+}
diff --git a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfgInternal.h b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfgInternal.h new file mode 100644 index 0000000..2b6faa5 --- /dev/null +++ b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfgInternal.h @@ -0,0 +1,230 @@ +/**
+
+ Copyright (c) 2006 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PCICFGPPI_INTERLNAL_H_
+#define __PCICFGPPI_INTERLNAL_H_
+
+#include <PiPei.h>
+#include <FrameworkPei.h>
+
+#include <Ppi/PciCfg2.h>
+#include <Ppi/PciCfg.h>
+
+#include <Library/BaseLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PciLib.h>
+#include <Library/PeimEntryPoint.h>
+
+#include <IndustryStandard\Pci.h>
+
+#define COMMON_TO_PCILIB_ADDRESS(A) (UINTN)PCI_LIB_ADDRESS( \
+ ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Bus, \
+ ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Device, \
+ ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Function, \
+ ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Register \
+ )
+
+
+/**
+ Reads from a given location in the PCI configuration space.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes.
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.
+
+ @param Address The physical address of the access. The format of
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
+
+ @param Buffer A pointer to the buffer of data..
+
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_DEVICE_ERROR There was a problem with the transaction.
+
+ @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this
+ time.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfg2Read (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+);
+
+/**
+ Write to a given location in the PCI configuration space.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes.
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.
+
+ @param Address The physical address of the access. The format of
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
+
+ @param Buffer A pointer to the buffer of data..
+
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_DEVICE_ERROR There was a problem with the transaction.
+
+ @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this
+ time.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfg2Write (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+);
+
+
+/**
+ PCI read-modify-write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes. Type
+ EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
+
+ @param Address The physical address of the access.
+
+ @param SetBits Points to value to bitwise-OR with the read configuration value.
+
+ The size of the value is determined by Width.
+
+ @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.
+ The size of the value is determined by Width.
+
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_DEVICE_ERROR There was a problem with the transaction.
+
+ @retval EFI_DEVICE_NOT_READY The device is not capable of supporting
+ the operation at this time.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfg2Modify (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN CONST VOID *SetBits,
+ IN CONST VOID *ClearBits
+);
+
+
+
+/**
+ PCI read operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param This Pointer to local data for the interface.
+ @param Width The width of the access. Enumerated in bytes.
+ @param Address The physical address of the access.
+ @param Buffer A pointer to the buffer of data.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfgRead (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+ );
+
+/**
+ PCI write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param This Pointer to local data for the interface.
+ @param Width The width of the access. Enumerated in bytes.
+ @param Address The physical address of the access.
+ @param Buffer A pointer to the buffer of data.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfgWrite (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+ );
+
+/**
+ PCI read-modify-write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param This Pointer to local data for the interface.
+ @param Width The width of the access. Enumerated in bytes.
+ @param Address The physical address of the access.
+ @param SetBits Value of the bits to set.
+ @param ClearBits Value of the bits to clear.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+PciCfgModify (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN SetBits,
+ IN UINTN ClearBits
+ );
+
+//
+// Global Variables
+//
+extern EFI_PEI_PCI_CFG_PPI gPciCfgPpi;
+extern EFI_PEI_PPI_DESCRIPTOR gPciCfgPpiList;
+
+
+#endif
diff --git a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/SingleSegmentPciCfgPei.msa b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/SingleSegmentPciCfgPei.msa new file mode 100644 index 0000000..3afa8b4 --- /dev/null +++ b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/SingleSegmentPciCfgPei.msa @@ -0,0 +1,58 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd" xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>PciCfg</ModuleName>
+ <ModuleType>PEIM</ModuleType>
+ <GuidValue>27A5159D-5E61-4809-919A-422E887101EF</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Single Segment Pci Configuration PPI</Abstract>
+ <Description>This file declares PciCfg PPI used to access PCI configuration space in PEI</Description>
+ <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
+ <License> + Copyright (c) 2006 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>PciCfg</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PciLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PeimEntryPoint</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciCfg.dxs</Filename>
+ <Filename>PciCfg.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <PPIs>
+ <Ppi Usage="ALWAYS_PRODUCED">
+ <PpiCName>gEfiPciCfgPpiInServiceTableGuid</PpiCName>
+ </Ppi>
+ </PPIs>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ <Extern>
+ <ModuleEntryPoint>PeimInitializePciCfg</ModuleEntryPoint>
+ </Extern>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file |