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| author | Sebastien Boeuf <sebastien.boeuf@intel.com> | 2021-12-10 22:41:54 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-12-11 14:26:05 +0000 |
| commit | 9afcd48a94e85586bc8ea61f2fba21476e716ca1 (patch) | |
| tree | 69515dad78f5ed295dd150269e941f2b91239fb0 /OvmfPkg/Library | |
| parent | e81a81e5846edcc4c2e91cf3a39d0ba8c31b687a (diff) | |
| download | edk2-9afcd48a94e85586bc8ea61f2fba21476e716ca1.zip edk2-9afcd48a94e85586bc8ea61f2fba21476e716ca1.tar.gz edk2-9afcd48a94e85586bc8ea61f2fba21476e716ca1.tar.bz2 | |
OvmfPkg: Handle Cloud Hypervisor host bridge
Handle things differently when the detected host bridge matches the
Cloud Hypervisor PCI host bridge identifier.
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
Diffstat (limited to 'OvmfPkg/Library')
6 files changed, 25 insertions, 2 deletions
diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c index 1d33c86..6d1e1cb 100644 --- a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c +++ b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c @@ -55,6 +55,9 @@ AcpiTimerLibConstructor ( AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
+ case CLOUDHV_DEVICE_ID:
+ mAcpiTimerIoAddr = CLOUDHV_ACPI_TIMER_IO_ADDRESS;
+ return RETURN_SUCCESS;
default:
DEBUG ((
DEBUG_ERROR,
diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c index 54a288d..c771997 100644 --- a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c +++ b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c @@ -53,6 +53,8 @@ AcpiTimerLibConstructor ( AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
+ case CLOUDHV_DEVICE_ID:
+ return RETURN_SUCCESS;
default:
DEBUG ((
DEBUG_ERROR,
@@ -111,6 +113,8 @@ InternalAcpiGetTimerTick ( case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
break;
+ case CLOUDHV_DEVICE_ID:
+ return IoRead32 (CLOUDHV_ACPI_TIMER_IO_ADDRESS);
default:
DEBUG ((
DEBUG_ERROR,
diff --git a/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c index 01f28b2..1158461 100644 --- a/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c +++ b/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c @@ -50,6 +50,9 @@ AcpiTimerLibConstructor ( case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
break;
+ case CLOUDHV_DEVICE_ID:
+ mAcpiTimerIoAddr = CLOUDHV_ACPI_TIMER_IO_ADDRESS;
+ return RETURN_SUCCESS;
default:
DEBUG ((
DEBUG_ERROR,
diff --git a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c index f73c59d..5feadc5 100644 --- a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c +++ b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c @@ -1390,6 +1390,7 @@ PciAcpiInitialization ( PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6b), PciHostIrqs[3]); // H
break;
case MICROVM_PSEUDO_DEVICE_ID:
+ case CLOUDHV_DEVICE_ID:
return;
default:
if (XenDetected ()) {
diff --git a/OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c b/OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c index 29abd57..c21d3c8 100644 --- a/OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c +++ b/OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c @@ -40,6 +40,9 @@ ResetShutdown ( case INTEL_Q35_MCH_DEVICE_ID:
AcpiPmBaseAddress = ICH9_PMBASE_VALUE;
break;
+ case CLOUDHV_DEVICE_ID:
+ IoWrite8 (CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS, 5 << 2 | 1 << 5);
+ CpuDeadLoop ();
default:
ASSERT (FALSE);
CpuDeadLoop ();
diff --git a/OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c b/OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c index a0db8b5..31f01b8 100644 --- a/OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c +++ b/OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c @@ -16,6 +16,7 @@ #include <OvmfPlatforms.h> // PIIX4_PMBA_VALUE
STATIC UINT16 mAcpiPmBaseAddress;
+STATIC UINT16 mAcpiHwReducedSleepCtl;
EFI_STATUS
EFIAPI
@@ -34,6 +35,9 @@ DxeResetInit ( case INTEL_Q35_MCH_DEVICE_ID:
mAcpiPmBaseAddress = ICH9_PMBASE_VALUE;
break;
+ case CLOUDHV_DEVICE_ID:
+ mAcpiHwReducedSleepCtl = CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS;
+ break;
default:
ASSERT (FALSE);
CpuDeadLoop ();
@@ -56,7 +60,12 @@ ResetShutdown ( VOID
)
{
- IoBitFieldWrite16 (mAcpiPmBaseAddress + 4, 10, 13, 0);
- IoOr16 (mAcpiPmBaseAddress + 4, BIT13);
+ if (mAcpiHwReducedSleepCtl) {
+ IoWrite8 (mAcpiHwReducedSleepCtl, 5 << 2 | 1 << 5);
+ } else {
+ IoBitFieldWrite16 (mAcpiPmBaseAddress + 4, 10, 13, 0);
+ IoOr16 (mAcpiPmBaseAddress + 4, BIT13);
+ }
+
CpuDeadLoop ();
}
|