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author | Khem Raj <raj.khem@gmail.com> | 2018-07-14 13:03:39 -0700 |
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committer | Jussi Pakkanen <jpakkane@gmail.com> | 2018-07-21 22:02:25 +0300 |
commit | 6fafbad6d5ba591075a72e4726af647cece7020d (patch) | |
tree | 7cc85ec813798996beeadd70988a697d78f21fd1 | |
parent | 306fa07f62bd6d2833af80a654411740a4626dd7 (diff) | |
download | meson-6fafbad6d5ba591075a72e4726af647cece7020d.zip meson-6fafbad6d5ba591075a72e4726af647cece7020d.tar.gz meson-6fafbad6d5ba591075a72e4726af647cece7020d.tar.bz2 |
mesonbuild: Recognise risc-v architecture
Signed-off-by: Khem Raj <raj.khem@gmail.com>
-rw-r--r-- | docs/markdown/Reference-tables.md | 2 | ||||
-rw-r--r-- | mesonbuild/environment.py | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/docs/markdown/Reference-tables.md b/docs/markdown/Reference-tables.md index 6486aa2..91a8e3c 100644 --- a/docs/markdown/Reference-tables.md +++ b/docs/markdown/Reference-tables.md @@ -53,6 +53,8 @@ set in the cross file. | ppc64 | 64 bit PPC processors | | e2k | MCST Elbrus processor | | parisc | HP PA-RISC processor | +| riscv32 | 32 bit RISC-V Open ISA| +| riscv64 | 64 bit RISC-V Open ISA| | sparc64 | SPARC v9 processor | Any cpu family not listed in the above list is not guaranteed to diff --git a/mesonbuild/environment.py b/mesonbuild/environment.py index 0aa0b32..7f5aae8 100644 --- a/mesonbuild/environment.py +++ b/mesonbuild/environment.py @@ -84,6 +84,8 @@ known_cpu_families = ( 'parisc', 'ppc', 'ppc64', + 'riscv32', + 'riscv64', 'sparc64', 'x86', 'x86_64' |