From 72baef13b9dce71f20ae840d9951e559e14abf6d Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 31 May 2024 11:02:04 +0200 Subject: host/i386: nothing looks at CPUINFO_SSE4 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The only user was the SSE4.1 variant of buffer_is_zero, which has been removed; code to compute CPUINFO_SSE4 is dead. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- util/cpuinfo-i386.c | 1 - 1 file changed, 1 deletion(-) (limited to 'util') diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index 9fddb18..18ab747 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -36,7 +36,6 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) info |= (d & bit_CMOV ? CPUINFO_CMOV : 0); info |= (d & bit_SSE2 ? CPUINFO_SSE2 : 0); - info |= (c & bit_SSE4_1 ? CPUINFO_SSE4 : 0); info |= (c & bit_MOVBE ? CPUINFO_MOVBE : 0); info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0); info |= (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0); -- cgit v1.1 From e68e97ce55b3d17af22dd62c3b3dc72f761b0862 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 31 May 2024 10:14:48 +0200 Subject: host/i386: assume presence of CMOV QEMU now requires an x86-64-v2 host, which always has CMOV. Use it freely in TCG generated code. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- util/cpuinfo-i386.c | 1 - 1 file changed, 1 deletion(-) (limited to 'util') diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index 18ab747..90f92a4 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -34,7 +34,6 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) if (max >= 1) { __cpuid(1, a, b, c, d); - info |= (d & bit_CMOV ? CPUINFO_CMOV : 0); info |= (d & bit_SSE2 ? CPUINFO_SSE2 : 0); info |= (c & bit_MOVBE ? CPUINFO_MOVBE : 0); info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0); -- cgit v1.1 From b18236897ca15c3db1506d8edb9a191dfe51429c Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 31 May 2024 11:02:46 +0200 Subject: host/i386: assume presence of SSE2 QEMU now requires an x86-64-v2 host, which has SSE2. Use it freely in buffer_is_zero. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- util/bufferiszero.c | 4 ++-- util/cpuinfo-i386.c | 1 - 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'util') diff --git a/util/bufferiszero.c b/util/bufferiszero.c index 74864f7..11c080e 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -188,14 +188,14 @@ static biz_accel_fn const accel_table[] = { static unsigned best_accel(void) { +#ifdef CONFIG_AVX2_OPT unsigned info = cpuinfo_init(); -#ifdef CONFIG_AVX2_OPT if (info & CPUINFO_AVX2) { return 2; } #endif - return info & CPUINFO_SSE2 ? 1 : 0; + return 1; } #elif defined(__aarch64__) && defined(__ARM_NEON) diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index 90f92a4..ca74ef0 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -34,7 +34,6 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) if (max >= 1) { __cpuid(1, a, b, c, d); - info |= (d & bit_SSE2 ? CPUINFO_SSE2 : 0); info |= (c & bit_MOVBE ? CPUINFO_MOVBE : 0); info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0); info |= (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0); -- cgit v1.1 From 433cd6d94a8256af70a5200f236dc8047c3c1468 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 31 May 2024 10:22:33 +0200 Subject: host/i386: assume presence of SSSE3 QEMU now requires an x86-64-v2 host, which has SSSE3 instructions (notably, PSHUFB which is used by QEMU's AES implementation). Do not bother checking it. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- util/cpuinfo-i386.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'util') diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index ca74ef0..6d474a6 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -38,8 +38,8 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0); info |= (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0); - /* Our AES support requires PSHUFB as well. */ - info |= ((c & bit_AES) && (c & bit_SSSE3) ? CPUINFO_AES : 0); + /* NOTE: our AES support requires SSSE3 (PSHUFB) as well. */ + info |= (c & bit_AES) ? CPUINFO_AES : 0; /* For AVX features, we must check available and usable. */ if ((c & bit_AVX) && (c & bit_OSXSAVE)) { -- cgit v1.1 From 45ccdbcb24baf99667997fac5cf60318e5e7db51 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 31 May 2024 10:29:32 +0200 Subject: host/i386: assume presence of POPCNT QEMU now requires an x86-64-v2 host, which has the POPCNT instruction. Use it freely in TCG-generated code. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- util/cpuinfo-i386.c | 1 - 1 file changed, 1 deletion(-) (limited to 'util') diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index 6d474a6..8f2694d 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -35,7 +35,6 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) __cpuid(1, a, b, c, d); info |= (c & bit_MOVBE ? CPUINFO_MOVBE : 0); - info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0); info |= (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0); /* NOTE: our AES support requires SSSE3 (PSHUFB) as well. */ -- cgit v1.1