From 75b208c28316095c4685e8596ceb9e3f656592e2 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Mon, 23 Nov 2020 07:17:47 -0500 Subject: target/i386: fix operand order for PDEP and PEXT For PDEP and PEXT, the mask is provided in the memory (mod+r/m) operand, and therefore is loaded in s->T0 by gen_ldst_modrm. The source is provided in the second source operand (VEX.vvvv) and therefore is loaded in s->T1. Fix the order in which they are passed to the helpers. Reported-by: Lenard Szolnoki Analyzed-by: Lenard Szolnoki Fixes: https://bugs.launchpad.net/qemu/+bug/1605123 Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- tests/tcg/i386/Makefile.target | 3 +++ tests/tcg/i386/test-i386-bmi2.c | 42 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 tests/tcg/i386/test-i386-bmi2.c (limited to 'tests/tcg') diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target index a66232a..ad187cb 100644 --- a/tests/tcg/i386/Makefile.target +++ b/tests/tcg/i386/Makefile.target @@ -18,6 +18,9 @@ test-i386-pcmpistri: CFLAGS += -msse4.2 run-test-i386-pcmpistri: QEMU_OPTS += -cpu max run-plugin-test-i386-pcmpistri-%: QEMU_OPTS += -cpu max +run-test-i386-bmi2: QEMU_OPTS += -cpu max +run-plugin-test-i386-bmi2-%: QEMU_OPTS += -cpu max + # # hello-i386 is a barebones app # diff --git a/tests/tcg/i386/test-i386-bmi2.c b/tests/tcg/i386/test-i386-bmi2.c new file mode 100644 index 0000000..935a4d2 --- /dev/null +++ b/tests/tcg/i386/test-i386-bmi2.c @@ -0,0 +1,42 @@ +/* See if various BMI2 instructions give expected results */ +#include +#include + +int main(int argc, char *argv[]) { + uint64_t ehlo = 0x202020204f4c4845ull; + uint64_t mask = 0xa080800302020001ull; + uint32_t result32; + +#ifdef __x86_64 + uint64_t result64; + + /* 64 bits */ + asm volatile ("pextq %2, %1, %0" : "=r"(result64) : "r"(ehlo), "m"(mask)); + assert(result64 == 133); + + asm volatile ("pdepq %2, %1, %0" : "=r"(result64) : "r"(result64), "m"(mask)); + assert(result64 == (ehlo & mask)); + + asm volatile ("pextq %2, %1, %0" : "=r"(result64) : "r"(-1ull), "m"(mask)); + assert(result64 == 511); /* mask has 9 bits set */ + + asm volatile ("pdepq %2, %1, %0" : "=r"(result64) : "r"(-1ull), "m"(mask)); + assert(result64 == mask); +#endif + + /* 32 bits */ + asm volatile ("pextl %2, %k1, %k0" : "=r"(result32) : "r"((uint32_t) ehlo), "m"(mask)); + assert(result32 == 5); + + asm volatile ("pdepl %2, %k1, %k0" : "=r"(result32) : "r"(result32), "m"(mask)); + assert(result32 == (uint32_t)(ehlo & mask)); + + asm volatile ("pextl %2, %k1, %k0" : "=r"(result32) : "r"(-1ull), "m"(mask)); + assert(result32 == 7); /* mask has 3 bits set */ + + asm volatile ("pdepl %2, %k1, %k0" : "=r"(result32) : "r"(-1ull), "m"(mask)); + assert(result32 == (uint32_t)mask); + + return 0; +} + -- cgit v1.1