From 6ae2e3bb338a8fda477fb825e72026b925fd49bd Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Tue, 5 Mar 2019 16:34:29 +0100 Subject: tests/tcg: target/mips: Extend functionality of MSA wrapper macros Add macros that will allow testing cases when one of the source registers is identical to the destination register. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1551800076-8104-8-git-send-email-aleksandar.markovic@rt-rk.com> --- tests/tcg/mips/include/wrappers_msa.h | 51 +++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) (limited to 'tests/tcg/mips') diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index c650ed2..9cffd55 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -38,6 +38,21 @@ static inline void do_msa_##suffix(void *input, void *output) \ ); \ } +#define DO_MSA__WD__WD(suffix, mnemonic) \ +static inline void do_msa_##suffix(void *input, void *output) \ +{ \ + __asm__ volatile ( \ + "move $t0, %0\n\t" \ + "ld.d $w11, 0($t0)\n\t" \ + #mnemonic " $w10, $w10\n\t" \ + "move $t0, %1\n\t" \ + "st.d $w10, 0($t0)\n\t" \ + : \ + : "r" (input), "r" (output) \ + : "t0", "memory" \ + ); \ +} + DO_MSA__WD__WS(NLOC_B, nloc.b) DO_MSA__WD__WS(NLOC_H, nloc.h) DO_MSA__WD__WS(NLOC_W, nloc.w) @@ -72,6 +87,42 @@ static inline void do_msa_##suffix(void *input1, void *input2, \ ); \ } +#define DO_MSA__WD__WD_WT(suffix, mnemonic) \ +static inline void do_msa_##suffix(void *input1, void *input2, \ + void *output) \ +{ \ + __asm__ volatile ( \ + "move $t0, %0\n\t" \ + "ld.d $w11, 0($t0)\n\t" \ + "move $t0, %1\n\t" \ + "ld.d $w12, 0($t0)\n\t" \ + #mnemonic " $w10, $w10, $w12\n\t" \ + "move $t0, %2\n\t" \ + "st.d $w10, 0($t0)\n\t" \ + : \ + : "r" (input1), "r" (input2), "r" (output) \ + : "t0", "memory" \ + ); \ +} + +#define DO_MSA__WD__WS_WD(suffix, mnemonic) \ +static inline void do_msa_##suffix(void *input1, void *input2, \ + void *output) \ +{ \ + __asm__ volatile ( \ + "move $t0, %0\n\t" \ + "ld.d $w11, 0($t0)\n\t" \ + "move $t0, %1\n\t" \ + "ld.d $w12, 0($t0)\n\t" \ + #mnemonic " $w10, $w11, $w10\n\t" \ + "move $t0, %2\n\t" \ + "st.d $w10, 0($t0)\n\t" \ + : \ + : "r" (input1), "r" (input2), "r" (output) \ + : "t0", "memory" \ + ); \ +} + DO_MSA__WD__WS_WT(ILVEV_B, ilvev.b) DO_MSA__WD__WS_WT(ILVEV_H, ilvev.h) DO_MSA__WD__WS_WT(ILVEV_W, ilvev.w) -- cgit v1.1