From 6001f7729e12dd1d810291e4cbf83cee8e07441d Mon Sep 17 00:00:00 2001 From: Laurent Vivier Date: Mon, 30 Apr 2018 01:58:40 +0200 Subject: tcg: workaround branch instruction overflow in tcg_out_qemu_ld/st ppc64 uses a BC instruction to call the tcg_out_qemu_ld/st slow path. BC instruction uses a relative address encoded on 14 bits. The slow path functions are added at the end of the generated instructions buffer, in the reverse order of the callers. So more we have slow path functions more the distance between the caller (BC) and the function increases. This patch changes the behavior to generate the functions in the same order of the callers. Cc: qemu-stable@nongnu.org Fixes: 15fa08f845 ("tcg: Dynamically allocate TCGOps") Signed-off-by: Laurent Vivier Message-Id: <20180429235840.16659-1-lvivier@redhat.com> Signed-off-by: Richard Henderson --- tcg/tcg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tcg/tcg.c') diff --git a/tcg/tcg.c b/tcg/tcg.c index b5e706b..551caf1 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -3297,7 +3297,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) s->code_ptr = tb->tc.ptr; #ifdef TCG_TARGET_NEED_LDST_LABELS - s->ldst_labels = NULL; + QSIMPLEQ_INIT(&s->ldst_labels); #endif #ifdef TCG_TARGET_NEED_POOL_LABELS s->pool_labels = NULL; -- cgit v1.1