From 627227636127c44df0e01ab8fd9fae3f731fa8b0 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 22 Oct 2022 19:58:21 +1000 Subject: tcg/riscv: Fix range matched by TCG_CT_CONST_M12 We were matching a signed 13-bit range, not a 12-bit range. Expand the commentary within the function and be explicit about all of the ranges. Reported-by: LIU Zhiwei Signed-off-by: Richard Henderson Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Message-Id: <20221022095821.2441874-1-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- tcg/riscv/tcg-target.c.inc | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) (limited to 'tcg/riscv/tcg-target.c.inc') diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 81a83e4..1911978 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -154,13 +154,26 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct) if ((ct & TCG_CT_CONST_ZERO) && val == 0) { return 1; } - if ((ct & TCG_CT_CONST_S12) && val == sextreg(val, 0, 12)) { + /* + * Sign extended from 12 bits: [-0x800, 0x7ff]. + * Used for most arithmetic, as this is the isa field. + */ + if ((ct & TCG_CT_CONST_S12) && val >= -0x800 && val <= 0x7ff) { return 1; } - if ((ct & TCG_CT_CONST_N12) && -val == sextreg(-val, 0, 12)) { + /* + * Sign extended from 12 bits, negated: [-0x7ff, 0x800]. + * Used for subtraction, where a constant must be handled by ADDI. + */ + if ((ct & TCG_CT_CONST_N12) && val >= -0x7ff && val <= 0x800) { return 1; } - if ((ct & TCG_CT_CONST_M12) && val >= -0xfff && val <= 0xfff) { + /* + * Sign extended from 12 bits, +/- matching: [-0x7ff, 0x7ff]. + * Used by addsub2, which may need the negative operation, + * and requires the modified constant to be representable. + */ + if ((ct & TCG_CT_CONST_M12) && val >= -0x7ff && val <= 0x7ff) { return 1; } return 0; -- cgit v1.1