From 52781543adc9590fee28d77b15634795a096fc86 Mon Sep 17 00:00:00 2001 From: malc Date: Tue, 29 Jul 2008 20:08:17 +0000 Subject: On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64 Avoids nasty warnings about flush_icache_range from gcc4 and inability to compile [cpu-]exec.c with gcc3 and -O, also the function is much too large to be candidate for inlining anyway. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4974 c046a42c-6fe2-441c-8c8c-71466251a162 --- tcg/ppc/tcg-target.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'tcg/ppc') diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 7f95dd1..218e4bc 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -1015,6 +1015,37 @@ static void tcg_out_brcond2 (TCGContext *s, const TCGArg *args, tcg_out_bc (s, (BC | BI (7, CR_EQ) | BO_COND_TRUE), label_index); } +void ppc_tb_set_jmp_target (unsigned long jmp_addr, unsigned long addr) +{ + uint32_t *ptr; + long disp = addr - jmp_addr; + unsigned long patch_size; + + ptr = (uint32_t *)jmp_addr; + + if ((disp << 6) >> 6 != disp) { + ptr[0] = 0x3c000000 | (addr >> 16); /* lis 0,addr@ha */ + ptr[1] = 0x60000000 | (addr & 0xffff); /* la 0,addr@l(0) */ + ptr[2] = 0x7c0903a6; /* mtctr 0 */ + ptr[3] = 0x4e800420; /* brctr */ + patch_size = 16; + } else { + /* patch the branch destination */ + if (disp != 16) { + *ptr = 0x48000000 | (disp & 0x03fffffc); /* b disp */ + patch_size = 4; + } else { + ptr[0] = 0x60000000; /* nop */ + ptr[1] = 0x60000000; + ptr[2] = 0x60000000; + ptr[3] = 0x60000000; + patch_size = 16; + } + } + /* flush icache */ + flush_icache_range(jmp_addr, jmp_addr + patch_size); +} + static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, const int *const_args) { -- cgit v1.1