From 5e3d0c199f4edf4ecdf8100464da441c60ce36e3 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 20 Oct 2022 00:55:36 +1000 Subject: tcg: Introduce tcg_target_call_oarg_reg MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace the flat array tcg_target_call_oarg_regs[] with a function call including the TCGCallReturnKind. Extend the set of registers for ARM to r0-r3 to match the ABI: https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#result-return Reviewed-by: Alex Bennée Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'tcg/i386') diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 7b573bd..2f0a952 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -109,12 +109,16 @@ static const int tcg_target_call_iarg_regs[] = { #endif }; -static const int tcg_target_call_oarg_regs[] = { - TCG_REG_EAX, -#if TCG_TARGET_REG_BITS == 32 - TCG_REG_EDX -#endif -}; +static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot) +{ + switch (kind) { + case TCG_CALL_RET_NORMAL: + tcg_debug_assert(slot >= 0 && slot <= 1); + return slot ? TCG_REG_EDX : TCG_REG_EAX; + default: + g_assert_not_reached(); + } +} /* Constants we accept. */ #define TCG_CT_CONST_S32 0x100 -- cgit v1.1