From c3513c836e4c19cd7a2a7f691995fdef587cec72 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 27 Jun 2018 08:40:23 -0700 Subject: target/openrisc: Fix mtspr shadow gprs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Missing break when this feature was added in 89e71e873d ("target/openrisc: implement shadow registers"). This was causing strange issues as we get writes into the translation block jump cache and other bits of state. Fixes: 89e71e873d ("target/openrisc: implement shadow registers") Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-by: Stafford Horne --- target/openrisc/sys_helper.c | 1 + 1 file changed, 1 insertion(+) (limited to 'target') diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index b284064..2f33736 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -98,6 +98,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, case TO_SPR(0, 1024) ... TO_SPR(0, 1024 + (16 * 32)): /* Shadow GPRs */ idx = (spr - 1024); env->shadow_gpr[idx / 32][idx % 32] = rb; + break; case TO_SPR(1, 512) ... TO_SPR(1, 512+DTLB_SIZE-1): /* DTLBW0MR 0-127 */ idx = spr - TO_SPR(1, 512); -- cgit v1.1