From 24f91e81b65fcdd0552d1f0fcb0ea7cfe3829c19 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Fri, 19 Jan 2018 18:24:22 +0000 Subject: target/*/cpu.h: remove softfloat.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As cpu.h is another typically widely included file which doesn't need full access to the softfloat API we can remove the includes from here as well. Where they do need types it's typically for float_status and the rounding modes so we move that to softfloat-types.h as well. As a result of not having softfloat in every cpu.h call we now need to add it to various helpers that do need the full softfloat.h definitions. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson [For PPC parts] Acked-by: David Gibson --- target/alpha/cpu.h | 2 -- target/arm/cpu.c | 1 + target/arm/cpu.h | 2 -- target/arm/helper-a64.c | 1 + target/arm/helper.c | 1 + target/arm/neon_helper.c | 1 + target/hppa/cpu.c | 1 + target/hppa/cpu.h | 1 - target/hppa/op_helper.c | 2 +- target/i386/cpu.h | 4 ---- target/i386/fpu_helper.c | 1 + target/m68k/cpu.c | 2 +- target/m68k/cpu.h | 1 - target/m68k/fpu_helper.c | 1 + target/m68k/helper.c | 1 + target/m68k/translate.c | 2 ++ target/microblaze/cpu.c | 1 + target/microblaze/cpu.h | 2 +- target/microblaze/op_helper.c | 1 + target/moxie/cpu.h | 1 - target/nios2/cpu.h | 1 - target/openrisc/cpu.h | 1 - target/openrisc/fpu_helper.c | 1 + target/ppc/cpu.h | 1 - target/ppc/fpu_helper.c | 1 + target/ppc/int_helper.c | 1 + target/ppc/translate_init.c | 1 + target/s390x/cpu.c | 1 + target/s390x/cpu.h | 2 -- target/s390x/fpu_helper.c | 1 + target/sh4/cpu.c | 1 + target/sh4/cpu.h | 2 -- target/sh4/op_helper.c | 1 + target/sparc/cpu.h | 2 -- target/sparc/fop_helper.c | 1 + target/tricore/cpu.h | 1 - target/tricore/fpu_helper.c | 1 + target/tricore/helper.c | 1 + target/unicore32/cpu.c | 1 + target/unicore32/cpu.h | 1 - target/unicore32/ucf64_helper.c | 1 + target/xtensa/cpu.h | 1 - target/xtensa/op_helper.c | 1 + 43 files changed, 29 insertions(+), 26 deletions(-) (limited to 'target') diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 09720c2..a79fc2e 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -33,8 +33,6 @@ #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" - #define ICACHE_LINE_SIZE 32 #define DCACHE_LINE_SIZE 32 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index d796085..1b3ae62 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -34,6 +34,7 @@ #include "sysemu/hw_accel.h" #include "kvm_arm.h" #include "disas/capstone.h" +#include "fpu/softfloat.h" static void arm_cpu_set_pc(CPUState *cs, vaddr value) { diff --git a/target/arm/cpu.h b/target/arm/cpu.h index de62df0..8c839fa 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -39,8 +39,6 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" - #define EXCP_UDEF 1 /* undefined instruction */ #define EXCP_SWI 2 /* software interrupt */ #define EXCP_PREFETCH_ABORT 3 diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 06fd321..10e08bd 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -31,6 +31,7 @@ #include "exec/cpu_ldst.h" #include "qemu/int128.h" #include "tcg.h" +#include "fpu/softfloat.h" #include /* For crc32 */ /* C2.4.7 Multiply and divide */ diff --git a/target/arm/helper.c b/target/arm/helper.c index e7586fc..32e4fd4 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -15,6 +15,7 @@ #include /* For crc32 */ #include "exec/semihost.h" #include "sysemu/kvm.h" +#include "fpu/softfloat.h" #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ diff --git a/target/arm/neon_helper.c b/target/arm/neon_helper.c index 689491c..a1ec653 100644 --- a/target/arm/neon_helper.c +++ b/target/arm/neon_helper.c @@ -11,6 +11,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 7b635cc..969f628 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -23,6 +23,7 @@ #include "cpu.h" #include "qemu-common.h" #include "exec/exec-all.h" +#include "fpu/softfloat.h" static void hppa_cpu_set_pc(CPUState *cs, vaddr value) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 7640c81..c88d844 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -51,7 +51,6 @@ #define CPUArchState struct CPUHPPAState #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" #define TARGET_PAGE_BITS 12 diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 4ee936b..a3af62d 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -24,7 +24,7 @@ #include "exec/cpu_ldst.h" #include "sysemu/sysemu.h" #include "qemu/timer.h" - +#include "fpu/softfloat.h" void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp) { diff --git a/target/i386/cpu.h b/target/i386/cpu.h index f91e37d..faf39ec 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -52,10 +52,6 @@ #define CPUArchState struct CPUX86State -#ifdef CONFIG_TCG -#include "fpu/softfloat.h" -#endif - enum { R_EAX = 0, R_ECX = 1, diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 9014b6f..ea5a0c4 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -24,6 +24,7 @@ #include "qemu/host-utils.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "fpu/softfloat.h" #define FPU_RC_MASK 0xc00 #define FPU_RC_NEAR 0x000 diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 3026714..a4ed877 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -24,7 +24,7 @@ #include "qemu-common.h" #include "migration/vmstate.h" #include "exec/exec-all.h" - +#include "fpu/softfloat.h" static void m68k_cpu_set_pc(CPUState *cs, vaddr value) { diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 1d79885..65f4fb9 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -28,7 +28,6 @@ #include "qemu-common.h" #include "exec/cpu-defs.h" #include "cpu-qom.h" -#include "fpu/softfloat.h" #define OS_BYTE 0 #define OS_WORD 1 diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 665e760..3c5a82a 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -23,6 +23,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "fpu/softfloat.h" /* Undefined offsets may be different on various FPU. * On 68040 they return 0.0 (floatx80_zero) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 20155c7..917d46e 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -24,6 +24,7 @@ #include "exec/gdbstub.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" #define SIGNBIT (1u << 31) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 70c7583..93cd389 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -32,6 +32,8 @@ #include "trace-tcg.h" #include "exec/log.h" +#include "fpu/softfloat.h" + //#define DEBUG_DISPATCH 1 diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index d8df2fb..4dc1404 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "exec/exec-all.h" +#include "fpu/softfloat.h" static const struct { const char *name; diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index f3e7405..1fe21c8 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -28,7 +28,7 @@ #define CPUArchState struct CPUMBState #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" +#include "fpu/softfloat-types.h" struct CPUMBState; typedef struct CPUMBState CPUMBState; #if !defined(CONFIG_USER_ONLY) diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 869072a..1b4fe79 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -24,6 +24,7 @@ #include "qemu/host-utils.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "fpu/softfloat.h" #define D(x) diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index a01f480..d85e1fc 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -34,7 +34,6 @@ #define MOXIE_EX_BREAK 16 #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" #define TARGET_PAGE_BITS 12 /* 4k */ diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 204b39a..cd4e40d 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -27,7 +27,6 @@ #define CPUArchState struct CPUNios2State #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" #include "qom/cpu.h" struct CPUNios2State; typedef struct CPUNios2State CPUNios2State; diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index fb46cc9..5050b11 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -29,7 +29,6 @@ struct OpenRISCCPU; #include "qemu-common.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" #include "qom/cpu.h" #define TYPE_OPENRISC_CPU "or1k-cpu" diff --git a/target/openrisc/fpu_helper.c b/target/openrisc/fpu_helper.c index 1375cea..977a1e8 100644 --- a/target/openrisc/fpu_helper.c +++ b/target/openrisc/fpu_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exception.h" +#include "fpu/softfloat.h" static inline uint32_t ieee_ex_to_openrisc(OpenRISCCPU *cpu, int fexcp) { diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 9f8cbbe..7bde188 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -79,7 +79,6 @@ #include "exec/cpu-defs.h" #include "cpu-qom.h" -#include "fpu/softfloat.h" #if defined (TARGET_PPC64) #define PPC_ELF_MACHINE EM_PPC64 diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index c4dab15..9ae418a 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -21,6 +21,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "internal.h" +#include "fpu/softfloat.h" static inline float128 float128_snan_to_qnan(float128 x) { diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 3a50f1e..35bdf09 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -23,6 +23,7 @@ #include "qemu/host-utils.h" #include "exec/helper-proto.h" #include "crypto/aes.h" +#include "fpu/softfloat.h" #include "helper_regs.h" /*****************************************************************************/ diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index cbaa343..17a87df 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -38,6 +38,7 @@ #include "sysemu/qtest.h" #include "qemu/cutils.h" #include "disas/capstone.h" +#include "fpu/softfloat.h" //#define PPC_DUMP_CPU //#define PPC_DEBUG_SPR diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index da7cb9c..a665b9e 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -42,6 +42,7 @@ #include "sysemu/arch_init.h" #include "sysemu/sysemu.h" #endif +#include "fpu/softfloat.h" #define CR0_RESET 0xE0UL #define CR14_RESET 0xC2000000UL; diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 21ce40d..96df2fe 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -41,8 +41,6 @@ #include "exec/cpu-all.h" -#include "fpu/softfloat.h" - #define NB_MMU_MODES 4 #define TARGET_INSN_START_EXTRA_WORDS 1 diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 3341591..43f8bf1 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -24,6 +24,7 @@ #include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" /* #define DEBUG_HELPER */ #ifdef DEBUG_HELPER diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index e37c187..6302cfd 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -25,6 +25,7 @@ #include "qemu-common.h" #include "migration/vmstate.h" #include "exec/exec-all.h" +#include "fpu/softfloat.h" static void superh_cpu_set_pc(CPUState *cs, vaddr value) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 52a4568..a649b68 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -40,8 +40,6 @@ #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" - #define TARGET_PAGE_BITS 12 /* 4k XXXXX */ #define TARGET_PHYS_ADDR_SPACE_BITS 32 diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index 4b8bbf6..4f825ba 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -21,6 +21,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "fpu/softfloat.h" #ifndef CONFIG_USER_ONLY diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 3eaffb3..9724134 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -29,8 +29,6 @@ #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" - /*#define EXCP_INTERRUPT 0x100*/ /* trap definitions */ diff --git a/target/sparc/fop_helper.c b/target/sparc/fop_helper.c index c7fb176..b6642fd 100644 --- a/target/sparc/fop_helper.c +++ b/target/sparc/fop_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" #define QT0 (env->qt0) #define QT1 (env->qt1) diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index f41d2ce..e7dfe4b 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -24,7 +24,6 @@ #include "qemu-common.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" #define CPUArchState struct CPUTriCoreState diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c index 7979bb6..df16290 100644 --- a/target/tricore/fpu_helper.c +++ b/target/tricore/fpu_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" #define QUIET_NAN 0x7fc00000 #define ADD_NAN 0x7fc00001 diff --git a/target/tricore/helper.c b/target/tricore/helper.c index 378c2a4..45276d3 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -19,6 +19,7 @@ #include "cpu.h" #include "exec/exec-all.h" +#include "fpu/softfloat.h" enum { TLBRET_DIRTY = -4, diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index fb837aa..29d160a 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -18,6 +18,7 @@ #include "qemu-common.h" #include "migration/vmstate.h" #include "exec/exec-all.h" +#include "fpu/softfloat.h" static void uc32_cpu_set_pc(CPUState *cs, vaddr value) { diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index a3cc714..42e1d52 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -23,7 +23,6 @@ #include "qemu-common.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" #define NB_MMU_MODES 2 diff --git a/target/unicore32/ucf64_helper.c b/target/unicore32/ucf64_helper.c index 6c91901..fad3fa6 100644 --- a/target/unicore32/ucf64_helper.c +++ b/target/unicore32/ucf64_helper.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" /* * The convention used for UniCore-F64 instructions: diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index f300c02..49c2e3c 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -36,7 +36,6 @@ #include "qemu-common.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" #include "xtensa-isa.h" #define NB_MMU_MODES 4 diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 43182b1..7486b99 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -34,6 +34,7 @@ #include "exec/cpu_ldst.h" #include "exec/address-spaces.h" #include "qemu/timer.h" +#include "fpu/softfloat.h" void xtensa_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, -- cgit v1.1