From 1426f2449eab988ccacfc2d444af7352eabbf8d2 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 20 Sep 2021 09:54:33 +0100 Subject: target/arm: Consolidate ifdef blocks in reset Move an ifndef CONFIG_USER_ONLY code block up in arm_cpu_reset() so it can be merged with another earlier one. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20210914120725.24992-4-peter.maydell@linaro.org --- target/arm/cpu.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) (limited to 'target') diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 1dff1d3..30e2cb9 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -265,6 +265,16 @@ static void arm_cpu_reset(DeviceState *dev) env->uncached_cpsr = ARM_CPU_MODE_SVC; } env->daif = PSTATE_D | PSTATE_A | PSTATE_I | PSTATE_F; + + /* AArch32 has a hard highvec setting of 0xFFFF0000. If we are currently + * executing as AArch32 then check if highvecs are enabled and + * adjust the PC accordingly. + */ + if (A32_BANKED_CURRENT_REG_GET(env, sctlr) & SCTLR_V) { + env->regs[15] = 0xFFFF0000; + } + + env->vfp.xregs[ARM_VFP_FPEXC] = 0; #endif if (arm_feature(env, ARM_FEATURE_M)) { @@ -372,18 +382,6 @@ static void arm_cpu_reset(DeviceState *dev) #endif } -#ifndef CONFIG_USER_ONLY - /* AArch32 has a hard highvec setting of 0xFFFF0000. If we are currently - * executing as AArch32 then check if highvecs are enabled and - * adjust the PC accordingly. - */ - if (A32_BANKED_CURRENT_REG_GET(env, sctlr) & SCTLR_V) { - env->regs[15] = 0xFFFF0000; - } - - env->vfp.xregs[ARM_VFP_FPEXC] = 0; -#endif - /* M profile requires that reset clears the exclusive monitor; * A profile does not, but clearing it makes more sense than having it * set with an exclusive access on address zero. -- cgit v1.1