From 8df3fd359697d68095c5f1ba47e83e8e237a3055 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Wed, 30 Jan 2019 14:56:29 -0800 Subject: target/xtensa: move WINDOW_BASE SR update to postprocessing Opcodes that modify WINDOW_BASE SR don't have dependency on opcodes that use windowed registers. If such opcodes are combined in a single instruction they may not be correctly ordered. Instead of adding said dependency use temporary register to store changed WINDOW_BASE value and do actual register window rotation as a postprocessing step. Not all opcodes that change WINDOW_BASE need this: retw, rfwo and rfwu are also jump opcodes, so they are guaranteed to be translated last and thus will not affect other opcodes in the same instruction. Signed-off-by: Max Filippov --- target/xtensa/cpu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'target/xtensa/cpu.h') diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index a3bab9c..dca4e4b 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -486,6 +486,7 @@ typedef struct CPUXtensaState { float64 f64; } fregs[16]; float_status fp_status; + uint32_t windowbase_next; #ifndef CONFIG_USER_ONLY xtensa_tlb_entry itlb[7][MAX_TLB_WAY_SIZE]; -- cgit v1.1