From 78271684719f34c1cc19f895e089f2f19b69698d Mon Sep 17 00:00:00 2001 From: Claudio Fontana Date: Thu, 4 Feb 2021 17:39:23 +0100 Subject: cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass we cannot in principle make the TCG Operations field definitions conditional on CONFIG_TCG in code that is included by both common_ss and specific_ss modules. Therefore, what we can do safely to restrict the TCG fields to TCG-only builds, is to move all tcg cpu operations into a separate header file, which is only included by TCG, target-specific code. This leaves just a NULL pointer in the cpu.h for the non-TCG builds. This also tidies up the code in all targets a bit, having all TCG cpu operations neatly contained by a dedicated data struct. Signed-off-by: Claudio Fontana Message-Id: <20210204163931.7358-16-cfontana@suse.de> Signed-off-by: Richard Henderson --- target/sparc/cpu.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) (limited to 'target/sparc/cpu.c') diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 1b785f6..aece2c7 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -848,6 +848,23 @@ static Property sparc_cpu_properties[] = { DEFINE_PROP_END_OF_LIST() }; +#ifdef CONFIG_TCG +#include "hw/core/tcg-cpu-ops.h" + +static struct TCGCPUOps sparc_tcg_ops = { + .initialize = sparc_tcg_init, + .synchronize_from_tb = sparc_cpu_synchronize_from_tb, + .cpu_exec_interrupt = sparc_cpu_exec_interrupt, + .tlb_fill = sparc_cpu_tlb_fill, + +#ifndef CONFIG_USER_ONLY + .do_interrupt = sparc_cpu_do_interrupt, + .do_transaction_failed = sparc_cpu_do_transaction_failed, + .do_unaligned_access = sparc_cpu_do_unaligned_access, +#endif /* !CONFIG_USER_ONLY */ +}; +#endif /* CONFIG_TCG */ + static void sparc_cpu_class_init(ObjectClass *oc, void *data) { SPARCCPUClass *scc = SPARC_CPU_CLASS(oc); @@ -863,31 +880,25 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = sparc_cpu_class_by_name; cc->parse_features = sparc_cpu_parse_features; cc->has_work = sparc_cpu_has_work; - cc->tcg_ops.do_interrupt = sparc_cpu_do_interrupt; - cc->tcg_ops.cpu_exec_interrupt = sparc_cpu_exec_interrupt; cc->dump_state = sparc_cpu_dump_state; #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) cc->memory_rw_debug = sparc_cpu_memory_rw_debug; #endif cc->set_pc = sparc_cpu_set_pc; - cc->tcg_ops.synchronize_from_tb = sparc_cpu_synchronize_from_tb; cc->gdb_read_register = sparc_cpu_gdb_read_register; cc->gdb_write_register = sparc_cpu_gdb_write_register; - cc->tcg_ops.tlb_fill = sparc_cpu_tlb_fill; #ifndef CONFIG_USER_ONLY - cc->tcg_ops.do_transaction_failed = sparc_cpu_do_transaction_failed; - cc->tcg_ops.do_unaligned_access = sparc_cpu_do_unaligned_access; cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug; cc->vmsd = &vmstate_sparc_cpu; #endif cc->disas_set_info = cpu_sparc_disas_set_info; - cc->tcg_ops.initialize = sparc_tcg_init; #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) cc->gdb_num_core_regs = 86; #else cc->gdb_num_core_regs = 72; #endif + cc->tcg_ops = &sparc_tcg_ops; } static const TypeInfo sparc_cpu_type_info = { -- cgit v1.1