From 98670d47cd8d63a529ff230fd39ddaa186156f8c Mon Sep 17 00:00:00 2001 From: Laurent Vivier Date: Thu, 18 Jan 2018 20:38:40 +0100 Subject: accel/tcg: add size paremeter in tlb_fill() The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier Reviewed-by: David Hildenbrand Reviewed-by: Richard Henderson Message-Id: <20180118193846.24953-2-laurent@vivier.eu> --- target/sh4/cpu.h | 2 +- target/sh4/helper.c | 4 ++-- target/sh4/op_helper.c | 6 +++--- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'target/sh4') diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index a2c26e0..52a4568 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -246,7 +246,7 @@ void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, void sh4_translate_init(void); int cpu_sh4_signal_handler(int host_signum, void *pinfo, void *puc); -int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, +int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf); diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 680b583..2ff0cf4 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -34,7 +34,7 @@ void superh_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { SuperHCPU *cpu = SUPERH_CPU(cs); @@ -458,7 +458,7 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical, return get_mmu_address(env, physical, prot, address, rw, access_type); } -int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, +int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { SuperHCPU *cpu = SUPERH_CPU(cs); diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index d798f23..4b8bbf6 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -40,12 +40,12 @@ void superh_cpu_do_unaligned_access(CPUState *cs, vaddr addr, cpu_loop_exit_restore(cs, retaddr); } -void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { int ret; - ret = superh_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); + ret = superh_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx); if (ret) { /* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr); -- cgit v1.1