From 1ea4a06af0f6578e5d0ddcea148503290b1c4907 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 7 Feb 2022 13:35:58 +0100 Subject: target: Use CPUArchState as interface to target-specific CPU state MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While CPUState is our interface with generic code, CPUArchState is our interface with target-specific code. Use CPUArchState as an abstract type, defined by each target. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20220214183144.27402-13-f4bug@amsat.org> --- target/ppc/cpu-qom.h | 2 +- target/ppc/cpu.h | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'target/ppc') diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 98facee..78b19a5 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -32,7 +32,7 @@ OBJECT_DECLARE_TYPE(PowerPCCPU, PowerPCCPUClass, POWERPC_CPU) -typedef struct CPUPPCState CPUPPCState; +typedef struct CPUArchState CPUPPCState; typedef struct ppc_tb_t ppc_tb_t; typedef struct ppc_dcr_t ppc_dcr_t; diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 1b68752..7be5ca2 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1077,7 +1077,7 @@ struct ppc_radix_page_info { #define PPC_CPU_OPCODES_LEN 0x40 #define PPC_CPU_INDIRECT_OPCODES_LEN 0x20 -struct CPUPPCState { +struct CPUArchState { /* Most commonly used resources during translated code execution first */ target_ulong gpr[32]; /* general purpose registers */ target_ulong gprh[32]; /* storage for GPR MSB, used by the SPE extension */ @@ -1477,7 +1477,6 @@ void ppc_compat_add_property(Object *obj, const char *name, uint32_t *compat_pvr, const char *basedesc); #endif /* defined(TARGET_PPC64) */ -typedef CPUPPCState CPUArchState; typedef PowerPCCPU ArchCPU; #include "exec/cpu-all.h" -- cgit v1.1