From 13514fc93e6b2ead6e984bcd104975b6b4f375e8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 16 Dec 2020 12:14:00 +0100 Subject: target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the single ISA_MIPS32R6 definition to check if the Release 6 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R6 in few commits. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210104221154.3127610-11-f4bug@amsat.org> --- target/mips/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/mips/translate.c') diff --git a/target/mips/translate.c b/target/mips/translate.c index 9fc9ded..fc93b9d 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31438,7 +31438,7 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) #else ctx->mem_idx = hflags_mmu_index(ctx->hflags); #endif - ctx->default_tcg_memop_mask = (ctx->insn_flags & (ISA_MIPS32R6 | ISA_MIPS64R6 | + ctx->default_tcg_memop_mask = (ctx->insn_flags & (ISA_MIPS32R6 | INSN_LOONGSON3A)) ? MO_UNALN : MO_ALIGN; LOG_DISAS("\ntb %p idx %d hflags %04x\n", ctx->base.tb, ctx->mem_idx, -- cgit v1.1