From 4479ec30c9c4d2399b6e5bf4e77d136cfd27aebd Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 19 Apr 2021 13:22:36 -0700 Subject: target/arm: Add ALIGN_MEM to TBFLAG_ANY Use this to signal when memory access alignment is required. This value comes from the CCR register for M-profile, and from the SCTLR register for A-profile. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'target/arm/translate.h') diff --git a/target/arm/translate.h b/target/arm/translate.h index 50c2aba..b185c14 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -87,6 +87,8 @@ typedef struct DisasContext { bool bt; /* True if any CP15 access is trapped by HSTR_EL2 */ bool hstr_active; + /* True if memory operations require alignment */ + bool align_mem; /* * >= 0, a copy of PSTATE.BTYPE, which will be 0 without v8.5-BTI. * < 0, set by the current instruction. -- cgit v1.1