From 437864216d63f052f3cd06ec8861d0e432496424 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 8 Feb 2020 12:58:03 +0000 Subject: target/arm: Replace CPSR_ERET_MASK with aarch32_cpsr_valid_mask CPSR_ERET_MASK was a useless renaming of CPSR_RESERVED. The function also takes into account bits that the cpu does not support. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/op_helper.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'target/arm/op_helper.c') diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 27d16ad..acf1815 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -400,11 +400,14 @@ void HELPER(cpsr_write)(CPUARMState *env, uint32_t val, uint32_t mask) /* Write the CPSR for a 32-bit exception return */ void HELPER(cpsr_write_eret)(CPUARMState *env, uint32_t val) { + uint32_t mask; + qemu_mutex_lock_iothread(); arm_call_pre_el_change_hook(env_archcpu(env)); qemu_mutex_unlock_iothread(); - cpsr_write(env, val, CPSR_ERET_MASK, CPSRWriteExceptionReturn); + mask = aarch32_cpsr_valid_mask(env->features, &env_archcpu(env)->isar); + cpsr_write(env, val, mask, CPSRWriteExceptionReturn); /* Generated code has already stored the new PC value, but * without masking out its low bits, because which bits need -- cgit v1.1