From adf92eab90e3f5f34c285da6d14d48952b7a8e72 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 16 Aug 2018 14:05:28 +0100 Subject: target/arm: Add sve-max-vq cpu property to -cpu max MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This allows the default (and maximum) vector length to be set from the command-line. Which is extraordinarily helpful in debugging problems depending on vector length without having to bake knowledge of PR_SET_SVE_VL into every guest binary. Cc: qemu-stable@nongnu.org (3.0.1) Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée Tested-by: Alex Bennée Signed-off-by: Peter Maydell --- target/arm/cpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'target/arm/cpu.c') diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 3848ef4..a4d46db 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -168,9 +168,9 @@ static void arm_cpu_reset(CPUState *s) env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3); env->cp15.cptr_el[3] |= CPTR_EZ; /* with maximum vector length */ - env->vfp.zcr_el[1] = ARM_MAX_VQ - 1; - env->vfp.zcr_el[2] = ARM_MAX_VQ - 1; - env->vfp.zcr_el[3] = ARM_MAX_VQ - 1; + env->vfp.zcr_el[1] = cpu->sve_max_vq - 1; + env->vfp.zcr_el[2] = env->vfp.zcr_el[1]; + env->vfp.zcr_el[3] = env->vfp.zcr_el[1]; #else /* Reset into the highest available EL */ if (arm_feature(env, ARM_FEATURE_EL3)) { -- cgit v1.1 From 191776b96a381b5d2b8d3f90c1c02b3e4779e5f7 Mon Sep 17 00:00:00 2001 From: Stefan Hajnoczi Date: Thu, 16 Aug 2018 14:05:28 +0100 Subject: target/arm: add "cortex-m0" CPU model MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Define a "cortex-m0" ARMv6-M CPU model. Most of the register reset values set by other CPU models are not relevant for the cut-down ARMv6-M architecture. Signed-off-by: Stefan Hajnoczi Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20180814162739.11814-3-stefanha@redhat.com Signed-off-by: Peter Maydell --- target/arm/cpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'target/arm/cpu.c') diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a4d46db..258ba6d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1255,6 +1255,15 @@ static void arm11mpcore_initfn(Object *obj) cpu->reset_auxcr = 1; } +static void cortex_m0_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + set_feature(&cpu->env, ARM_FEATURE_V6); + set_feature(&cpu->env, ARM_FEATURE_M); + + cpu->midr = 0x410cc200; +} + static void cortex_m3_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -1845,6 +1854,8 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "arm1136", .initfn = arm1136_initfn }, { .name = "arm1176", .initfn = arm1176_initfn }, { .name = "arm11mpcore", .initfn = arm11mpcore_initfn }, + { .name = "cortex-m0", .initfn = cortex_m0_initfn, + .class_init = arm_v7m_class_init }, { .name = "cortex-m3", .initfn = cortex_m3_initfn, .class_init = arm_v7m_class_init }, { .name = "cortex-m4", .initfn = cortex_m4_initfn, -- cgit v1.1