From 7f65f4b059c4a91b97a032801a4c137e87612c6a Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sun, 16 Oct 2011 02:56:01 +0400 Subject: target-xtensa: increase xtensa options accuracy - add separate options for each operation in the MISC_OP; - add an option for MULSH/MULUH; - put S32C1I under conditional store option. Signed-off-by: Max Filippov Signed-off-by: Blue Swirl --- target-xtensa/cpu.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'target-xtensa/cpu.h') diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index b43e565..df168d5 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -52,9 +52,13 @@ enum { XTENSA_OPTION_EXTENDED_L32R, XTENSA_OPTION_16_BIT_IMUL, XTENSA_OPTION_32_BIT_IMUL, + XTENSA_OPTION_32_BIT_IMUL_HIGH, XTENSA_OPTION_32_BIT_IDIV, XTENSA_OPTION_MAC16, - XTENSA_OPTION_MISC_OP, + XTENSA_OPTION_MISC_OP_NSA, + XTENSA_OPTION_MISC_OP_MINMAX, + XTENSA_OPTION_MISC_OP_SEXT, + XTENSA_OPTION_MISC_OP_CLAMPS, XTENSA_OPTION_COPROCESSOR, XTENSA_OPTION_BOOLEAN, XTENSA_OPTION_FP_COPROCESSOR, -- cgit v1.1