From 62a80559368de7b2dedc91039d8d11650e31ba4c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Fri, 21 Jun 2013 22:29:57 +0200 Subject: target-unicore32: Change gen_intermediate_code_internal() signature MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use UniCore32CPU and bool. Prepares for moving singlestep_enabled field to CPUState. Reviewed-by: Richard Henderson Signed-off-by: Andreas Färber --- target-unicore32/translate.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'target-unicore32') diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index e1fe4e6..d85185d 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -1876,9 +1876,10 @@ static void disas_uc32_insn(CPUUniCore32State *env, DisasContext *s) /* generate intermediate code in gen_opc_buf and gen_opparam_buf for basic block 'tb'. If search_pc is TRUE, also generate PC information for each intermediate instruction. */ -static inline void gen_intermediate_code_internal(CPUUniCore32State *env, - TranslationBlock *tb, int search_pc) +static inline void gen_intermediate_code_internal(UniCore32CPU *cpu, + TranslationBlock *tb, bool search_pc) { + CPUUniCore32State *env = &cpu->env; DisasContext dc1, *dc = &dc1; CPUBreakpoint *bp; uint16_t *gen_opc_end; @@ -2065,12 +2066,12 @@ done_generating: void gen_intermediate_code(CPUUniCore32State *env, TranslationBlock *tb) { - gen_intermediate_code_internal(env, tb, 0); + gen_intermediate_code_internal(uc32_env_get_cpu(env), tb, false); } void gen_intermediate_code_pc(CPUUniCore32State *env, TranslationBlock *tb) { - gen_intermediate_code_internal(env, tb, 1); + gen_intermediate_code_internal(uc32_env_get_cpu(env), tb, true); } static const char *cpu_mode_names[16] = { -- cgit v1.1