From 651721b2a55370cf04794d5ce397984c78fc0fec Mon Sep 17 00:00:00 2001 From: aurel32 Date: Mon, 9 Mar 2009 18:50:24 +0000 Subject: targe-ppc: optimize mfcr and mtcrf Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6793 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-ppc/helper.h | 3 --- target-ppc/op_helper.c | 24 ------------------------ target-ppc/translate.c | 29 ++++++++++++++++++++++++++--- 3 files changed, 26 insertions(+), 30 deletions(-) (limited to 'target-ppc') diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 85cdd23..5a04bee 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -30,9 +30,6 @@ DEF_HELPER_1(dcbz_970, void, tl) DEF_HELPER_1(icbi, void, tl) DEF_HELPER_4(lscbx, tl, tl, i32, i32, i32) -DEF_HELPER_0(load_cr, tl) -DEF_HELPER_2(store_cr, void, tl, i32) - #if defined(TARGET_PPC64) DEF_HELPER_2(mulhd, i64, i64, i64) DEF_HELPER_2(mulhdu, i64, i64, i64) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index f21f695..2c6a27f 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -54,30 +54,6 @@ void helper_raise_exception (uint32_t exception) } /*****************************************************************************/ -/* Registers load and stores */ -target_ulong helper_load_cr (void) -{ - return (env->crf[0] << 28) | - (env->crf[1] << 24) | - (env->crf[2] << 20) | - (env->crf[3] << 16) | - (env->crf[4] << 12) | - (env->crf[5] << 8) | - (env->crf[6] << 4) | - (env->crf[7] << 0); -} - -void helper_store_cr (target_ulong val, uint32_t mask) -{ - int i, sh; - - for (i = 0, sh = 7; i < 8; i++, sh--) { - if (mask & (1 << sh)) - env->crf[i] = (val >> (sh * 4)) & 0xFUL; - } -} - -/*****************************************************************************/ /* SPR accesses */ void helper_load_dump_spr (uint32_t sprn) { diff --git a/target-ppc/translate.c b/target-ppc/translate.c index e400cf2..0368c37 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3859,7 +3859,24 @@ GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC) cpu_gpr[rD(ctx->opcode)], crn * 4); } } else { - gen_helper_load_cr(cpu_gpr[rD(ctx->opcode)]); + TCGv_i32 t0 = tcg_temp_new_i32(); + tcg_gen_mov_i32(t0, cpu_crf[0]); + tcg_gen_shli_i32(t0, t0, 4); + tcg_gen_or_i32(t0, t0, cpu_crf[1]); + tcg_gen_shli_i32(t0, t0, 4); + tcg_gen_or_i32(t0, t0, cpu_crf[2]); + tcg_gen_shli_i32(t0, t0, 4); + tcg_gen_or_i32(t0, t0, cpu_crf[3]); + tcg_gen_shli_i32(t0, t0, 4); + tcg_gen_or_i32(t0, t0, cpu_crf[4]); + tcg_gen_shli_i32(t0, t0, 4); + tcg_gen_or_i32(t0, t0, cpu_crf[5]); + tcg_gen_shli_i32(t0, t0, 4); + tcg_gen_or_i32(t0, t0, cpu_crf[6]); + tcg_gen_shli_i32(t0, t0, 4); + tcg_gen_or_i32(t0, t0, cpu_crf[7]); + tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); + tcg_temp_free_i32(t0); } } @@ -3956,8 +3973,14 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC) tcg_temp_free_i32(temp); } } else { - TCGv_i32 temp = tcg_const_i32(crm); - gen_helper_store_cr(cpu_gpr[rS(ctx->opcode)], temp); + TCGv_i32 temp = tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]); + for (crn = 0 ; crn < 8 ; crn++) { + if (crm & (1 << crn)) { + tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4); + tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf); + } + } tcg_temp_free_i32(temp); } } -- cgit v1.1