From eb5ceb4d389b1b34b210baf9fa49b48bacb2538b Mon Sep 17 00:00:00 2001
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Mon, 21 Mar 2016 13:52:39 +0100
Subject: ppc: Add dummy CIABR SPR

We should implement HW breakpoint/watchpoint, qemu supports them...

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target-ppc/cpu.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'target-ppc/cpu.h')

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index a3c4fb1..29c4860 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1393,6 +1393,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch)
 #define SPR_PSPB              (0x09F)
 #define SPR_DAWR              (0x0B4)
 #define SPR_RPR               (0x0BA)
+#define SPR_CIABR             (0x0BB)
 #define SPR_DAWRX             (0x0BC)
 #define SPR_HFSCR             (0x0BE)
 #define SPR_VRSAVE            (0x100)
-- 
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