From a0e372f0c49ac01faeaeb73a6e8f50e8ac615f34 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Fri, 28 Jun 2013 23:18:47 +0200 Subject: cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle (for lm32) Acked-by: Max Filippov (for xtensa) Signed-off-by: Andreas Färber --- target-openrisc/cpu.c | 1 + 1 file changed, 1 insertion(+) (limited to 'target-openrisc') diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index 7718820..9b042e1 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -159,6 +159,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; dc->vmsd = &vmstate_openrisc_cpu; #endif + cc->gdb_num_core_regs = 32 + 3; } static void cpu_register(const OpenRISCCPUInfo *info) -- cgit v1.1 From 30028739eb6b2e95b94b957f3b4f8f258da3aa88 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 7 Jul 2013 12:40:38 +0200 Subject: target-openrisc: Move cpu_gdb_{read,write}_register() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Jia Liu Signed-off-by: Andreas Färber --- target-openrisc/gdbstub.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 target-openrisc/gdbstub.c (limited to 'target-openrisc') diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c new file mode 100644 index 0000000..fba096a --- /dev/null +++ b/target-openrisc/gdbstub.c @@ -0,0 +1,77 @@ +/* + * OpenRISC gdb server stub + * + * Copyright (c) 2003-2005 Fabrice Bellard + * Copyright (c) 2013 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) +{ + if (n < 32) { + GET_REG32(env->gpr[n]); + } else { + switch (n) { + case 32: /* PPC */ + GET_REG32(env->ppc); + + case 33: /* NPC */ + GET_REG32(env->npc); + + case 34: /* SR */ + GET_REG32(env->sr); + + default: + break; + } + } + return 0; +} + +static int cpu_gdb_write_register(CPUOpenRISCState *env, + uint8_t *mem_buf, int n) +{ + OpenRISCCPU *cpu = openrisc_env_get_cpu(env); + CPUClass *cc = CPU_GET_CLASS(cpu); + uint32_t tmp; + + if (n > cc->gdb_num_core_regs) { + return 0; + } + + tmp = ldl_p(mem_buf); + + if (n < 32) { + env->gpr[n] = tmp; + } else { + switch (n) { + case 32: /* PPC */ + env->ppc = tmp; + break; + + case 33: /* NPC */ + env->npc = tmp; + break; + + case 34: /* SR */ + env->sr = tmp; + break; + + default: + break; + } + } + return 4; +} -- cgit v1.1 From 986a2998932e978e63fc3b7ead1fef81f7aad52e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 7 Jul 2013 13:05:05 +0200 Subject: gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This avoids polluting the global namespace with a non-prefixed macro and makes it obvious in the call sites that we return. Semi-automatic conversion using, e.g., sed -i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target-*/gdbstub.c followed by manual tweaking for sparc's GET_REGA() and Coding Style. Acked-by: Michael Walle (for lm32) Acked-by: Max Filippov (for xtensa) Signed-off-by: Andreas Färber --- target-openrisc/gdbstub.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'target-openrisc') diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c index fba096a..bdb8d2c 100644 --- a/target-openrisc/gdbstub.c +++ b/target-openrisc/gdbstub.c @@ -21,17 +21,17 @@ static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) { if (n < 32) { - GET_REG32(env->gpr[n]); + return gdb_get_reg32(mem_buf, env->gpr[n]); } else { switch (n) { case 32: /* PPC */ - GET_REG32(env->ppc); + return gdb_get_reg32(mem_buf, env->ppc); case 33: /* NPC */ - GET_REG32(env->npc); + return gdb_get_reg32(mem_buf, env->npc); case 34: /* SR */ - GET_REG32(env->sr); + return gdb_get_reg32(mem_buf, env->sr); default: break; -- cgit v1.1 From 5b50e790f9e9403d11b4164193b76530ee85a2a1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 29 Jun 2013 04:18:45 +0200 Subject: cpu: Introduce CPUClass::gdb_{read,write}_register() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle (for lm32) Acked-by: Max Filippov (for xtensa) Signed-off-by: Andreas Färber --- target-openrisc/Makefile.objs | 1 + target-openrisc/cpu.c | 2 ++ target-openrisc/cpu.h | 2 ++ target-openrisc/gdbstub.c | 16 +++++++++++----- 4 files changed, 16 insertions(+), 5 deletions(-) (limited to 'target-openrisc') diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs index 44dc539..397d016 100644 --- a/target-openrisc/Makefile.objs +++ b/target-openrisc/Makefile.objs @@ -2,3 +2,4 @@ obj-$(CONFIG_SOFTMMU) += machine.o obj-y += cpu.o exception.o interrupt.o mmu.o translate.o obj-y += exception_helper.o fpu_helper.o int_helper.o \ interrupt_helper.o mmu_helper.o sys_helper.o +obj-y += gdbstub.o diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index 9b042e1..aa269fb 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -155,6 +155,8 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = openrisc_cpu_do_interrupt; cc->dump_state = openrisc_cpu_dump_state; cc->set_pc = openrisc_cpu_set_pc; + cc->gdb_read_register = openrisc_cpu_gdb_read_register; + cc->gdb_write_register = openrisc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; dc->vmsd = &vmstate_openrisc_cpu; diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 3ddb767..8fd0bc0 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -350,6 +350,8 @@ void openrisc_cpu_do_interrupt(CPUState *cpu); void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int openrisc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void openrisc_translate_init(void); int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, target_ulong address, diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c index bdb8d2c..18bcc46 100644 --- a/target-openrisc/gdbstub.c +++ b/target-openrisc/gdbstub.c @@ -17,9 +17,15 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) +int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + OpenRISCCPU *cpu = OPENRISC_CPU(cs); + CPUOpenRISCState *env = &cpu->env; + if (n < 32) { return gdb_get_reg32(mem_buf, env->gpr[n]); } else { @@ -40,11 +46,11 @@ static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUOpenRISCState *env, - uint8_t *mem_buf, int n) +int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); - CPUClass *cc = CPU_GET_CLASS(cpu); + OpenRISCCPU *cpu = OPENRISC_CPU(cs); + CPUClass *cc = CPU_GET_CLASS(cs); + CPUOpenRISCState *env = &cpu->env; uint32_t tmp; if (n > cc->gdb_num_core_regs) { -- cgit v1.1