From 959082fc4a93a016a6b697e1e0c2b373d8a3a373 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 17 Sep 2015 14:25:46 -0700 Subject: target-*: Increment num_insns immediately after tcg_gen_insn_start This does tidy the icount test common to all targets. Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-mips/translate.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'target-mips') diff --git a/target-mips/translate.c b/target-mips/translate.c index aa0e0fd..66147d8 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -19619,8 +19619,9 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb, tcg_ctx.gen_opc_icount[lj] = num_insns; } tcg_gen_insn_start(ctx.pc); + num_insns++; - if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) { + if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); } @@ -19659,8 +19660,6 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb, } ctx.pc += insn_bytes; - num_insns++; - /* Execute a branch and its delay slot as a single instruction. This is what GDB expects and is consistent with what the hardware does (e.g. if a delay slot instruction faults, the -- cgit v1.1