From 4386f08767240080334539ac0b07a8bfe30bffe9 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Tue, 4 Nov 2014 15:42:19 +0000 Subject: target-mips: Enable vectored interrupt support for the 74Kf CPU Enable vectored interrupt support for the 74Kf CPU, reflecting hardware. Signed-off-by: Maciej W. Rozycki Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- target-mips/translate_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target-mips') diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index f0c1072..7f73aa2 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -334,7 +334,7 @@ static const mips_def_t mips_defs[] = (1 << CP0C1_CA), .CP0_Config2 = MIPS_CONFIG2, .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) | - (0 << CP0C3_VInt), + (1 << CP0C3_VInt), .CP0_LLAddr_rw_bitmask = 0, .CP0_LLAddr_shift = 4, .SYNCI_Step = 32, -- cgit v1.1