From 40d48212f934d4deab40ffe84a0f9c4c553d4742 Mon Sep 17 00:00:00 2001 From: Leon Alrae Date: Fri, 25 Mar 2016 13:49:35 +0000 Subject: target-mips: check CP0 enabled for CACHE instruction also in R6 Signed-off-by: Leon Alrae --- target-mips/translate.c | 1 + 1 file changed, 1 insertion(+) (limited to 'target-mips') diff --git a/target-mips/translate.c b/target-mips/translate.c index a5b8805..65f2caf 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -17194,6 +17194,7 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx) /* Treat as NOP. */ break; case R6_OPC_CACHE: + check_cp0_enabled(ctx); /* Treat as NOP. */ break; case R6_OPC_SC: -- cgit v1.1