From 3fc00a7bdeffd26932c4f27a6bc4f902f86fbbe9 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Thu, 15 Jul 2010 23:13:11 +0200 Subject: target-mips: fix xtlb exception for loongson Loongson 2E and 2F use the same entry for xtlb and tlb exception, at offset 0x000. Signed-off-by: Aurelien Jarno --- target-mips/helper.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'target-mips') diff --git a/target-mips/helper.c b/target-mips/helper.c index ea221ab..de2ed7d 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -491,7 +491,8 @@ void do_interrupt (CPUState *env) int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0; int KX = (env->CP0_Status & (1 << CP0St_KX)) != 0; - if ((R == 0 && UX) || (R == 1 && SX) || (R == 3 && KX)) + if (((R == 0 && UX) || (R == 1 && SX) || (R == 3 && KX)) && + (!(env->insn_flags & (INSN_LOONGSON2E | INSN_LOONGSON2F)))) offset = 0x080; else #endif @@ -507,7 +508,8 @@ void do_interrupt (CPUState *env) int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0; int KX = (env->CP0_Status & (1 << CP0St_KX)) != 0; - if ((R == 0 && UX) || (R == 1 && SX) || (R == 3 && KX)) + if (((R == 0 && UX) || (R == 1 && SX) || (R == 3 && KX)) && + (!(env->insn_flags & (INSN_LOONGSON2E | INSN_LOONGSON2F)))) offset = 0x080; else #endif -- cgit v1.1