From 4abf79a428bd1db681d6f4b5e521aa78cf913322 Mon Sep 17 00:00:00 2001 From: Dong Xu Wang Date: Tue, 22 Nov 2011 18:06:21 +0800 Subject: fix spelling in target sub directory Cc: Richard Henderson Cc: Edgar E. Iglesias Cc: Aurelien Jarno Cc: Alexander Graf Cc: Aurelien Jarno Cc: Blue Swirl Signed-off-by: Dong Xu Wang Signed-off-by: Stefan Hajnoczi --- target-microblaze/cpu.h | 2 +- target-microblaze/translate.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'target-microblaze') diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 3530286..1a307e3 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -243,7 +243,7 @@ typedef struct CPUMBState { #define DRTE_FLAG (1 << 17) #define DRTB_FLAG (1 << 18) #define D_FLAG (1 << 19) /* Bit in ESR. */ -/* TB dependant CPUState. */ +/* TB dependent CPUState. */ #define IFLAGS_TB_MASK (D_FLAG | IMM_FLAG | DRTI_FLAG | DRTE_FLAG | DRTB_FLAG) uint32_t iflags; diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 366fd3e..d7f513d 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -120,7 +120,7 @@ static inline int sign_extend(unsigned int val, unsigned int width) static inline void t_sync_flags(DisasContext *dc) { - /* Synch the tb dependant flags between translator and runtime. */ + /* Synch the tb dependent flags between translator and runtime. */ if (dc->tb_flags != dc->synced_flags) { tcg_gen_movi_tl(env_iflags, dc->tb_flags); dc->synced_flags = dc->tb_flags; @@ -1122,7 +1122,7 @@ static void dec_store(DisasContext *dc) if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) { tcg_gen_movi_tl(cpu_SR[SR_PC], dc->pc); /* FIXME: if the alignment is wrong, we should restore the value - * in memory. One possible way to acheive this is to probe + * in memory. One possible way to achieve this is to probe * the MMU prior to the memaccess, thay way we could put * the alignment checks in between the probe and the mem * access. -- cgit v1.1