From 21e87c4625f290824f4f05d098e576cda40421ce Mon Sep 17 00:00:00 2001 From: Avi Kivity Date: Tue, 4 Oct 2011 16:26:35 +0200 Subject: i386: wire up MSR_IA32_MISC_ENABLE It's needed for its default value - bit 0 specifies that "rep movs" is good enough for memcpy, and Linux may use a slower memcpu if it is not set, depending on cpu family/model. Signed-off-by: Avi Kivity Signed-off-by: Marcelo Tosatti --- target-i386/cpu.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'target-i386/cpu.h') diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 29412dc..a08ce9d 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -300,6 +300,10 @@ #define MSR_IA32_PERF_STATUS 0x198 +#define MSR_IA32_MISC_ENABLE 0x1a0 +/* Indicates good rep/movs microcode on some processors: */ +#define MSR_IA32_MISC_ENABLE_DEFAULT 1 + #define MSR_MTRRphysBase(reg) (0x200 + 2 * (reg)) #define MSR_MTRRphysMask(reg) (0x200 + 2 * (reg) + 1) @@ -691,6 +695,7 @@ typedef struct CPUX86State { uint64_t tsc_deadline; uint64_t mcg_status; + uint64_t msr_ia32_misc_enable; /* exception/interrupt handling */ int error_code; -- cgit v1.1